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* Merge tag 'u-boot-at91-2024.04-a' of ↵Tom Rini2024-01-311-3/+0
|\ | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 First set of u-boot-at91 features for the 2024.04 cycle: This set includes some DT alignments and solves a compile issue for custom nand defconfigs.
| * mtd: nand: raw: atmel: Remove duplicate definitionsAlexander Dahl2024-01-221-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These removed definitions were specific to some sam9 SoCs, but not generic over all at91 SoCs. The correct SoC specific definitions for ATMEL_BASE_PMECC are spread over different header files in arch/arm/mach-at91/include/mach directory. Fixes a build error on a custon board based on SAMA5D2: Building current source for 73 boards (16 threads, 1 job per thread) arm: + vera2 +drivers/mtd/nand/raw/atmel/pmecc.c:819: warning: "ATMEL_BASE_PMECC" redefined + 819 | #define ATMEL_BASE_PMECC 0xffffe000 + | +In file included from include/configs/vera2.h:11, + from include/config.h:3, + from include/linux/mtd/rawnand.h:16, + from drivers/mtd/nand/raw/atmel/pmecc.c:44: +include/asm/arch/sama5d2.h:171: note: this is the location of the previous definition + 171 | #define ATMEL_BASE_PMECC (ATMEL_BASE_HSMC + 0x70) +drivers/mtd/nand/raw/atmel/pmecc.c:820: warning: "ATMEL_BASE_PMERRLOC" redefined + 820 | #define ATMEL_BASE_PMERRLOC 0xffffe600 +include/asm/arch/sama5d2.h:172: note: this is the location of the previous definition + 172 | #define ATMEL_BASE_PMERRLOC (ATMEL_BASE_HSMC + 0x500) Fixes: a490e1b7c017 ("nand: atmel: Add pmecc driver") Signed-off-by: Alexander Dahl <ada@thorsis.com>
* | treewide: Remove clk_freeSean Anderson2024-01-291-3/+1
|/ | | | | | | This function is a no-op. Remove it. Signed-off-by: Sean Anderson <seanga2@gmail.com> Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
* mtd: rawnand: omap_gpmc: fix OF based partition parsing for NANDRoger Quadros2024-01-151-0/+2
| | | | | | | | | Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* mtd: rawnand: omap_gpmc: Use DT provided IO addressRoger Quadros2024-01-151-5/+14
| | | | | | | | | | For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* mtd: rawnand: omap_elm: Fix elm_init definitionRoger Quadros2024-01-152-8/+2
| | | | | | | | | | | | The macro ELM_BASE is defined in mach/hardware.h and is not visible at the omap_elm.h header file. Avoid using it in omap_elm.h. Reported-by: Hong Guan <hguan@ti.com> Fixes: 7363cf0581a3 ("mtd: rawnand: omap_elm: u-boot driver model support") Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/all/20231211114600.4414-3-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* mtd: nand: omap_gpmc: Fix NAND in SPL for AM335xRoger Quadros2024-01-151-66/+29
| | | | | | | | | | | | | | | | | | | | AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* mtd: nand: check nand_mtd_to_devnum() argumentDario Binacchi2024-01-151-1/+4
| | | | | | | | | If the "mtd" parameter is NULL, the search will definitely yield a negative result. In that case, it's better to exit immediately. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20231102113829.58852-1-dario.binacchi@amarulasolutions.com
* mtd: nand: complete nand_register() arguments checkDario Binacchi2024-01-151-1/+1
| | | | | | | | | The patch checks that the "mtd" parameter is accessible before proceeding. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20231102112743.57420-1-dario.binacchi@amarulasolutions.com
* Merge patch series "Import "string" I/O functions from Linux"Tom Rini2023-11-282-67/+0
|\ | | | | | | | | | | | | | | | | To quote the author: This series imports generic versions of ioread_rep/iowrite_rep and reads/writes from Linux. Some cleanup is done to make sure that all platforms have proper defines for implemented functions and there are no redefinitions.
| * asm-generic: Import functions from LinuxIgor Prusov2023-11-282-67/+0
| | | | | | | | | | | | | | | | | | | | | | | | Currently {read,write}s{b,w,lq}() functions are available only on some architectures, and there are no io{read,write}{8,16,32,64}_rep() functions in u-boot. This patch adds generic versions that may be used without arch-specific implementation. Since some of added functions were already added locally in some files, remove them to avoid redeclaration errors. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
* | Merge branch '2023-11-16-assorted-updates' into nextTom Rini2023-11-174-8/+5
|\ \ | | | | | | | | | | | | | | | | | | - squashfs improvements, remove common.h in some places, assorted code fixes, fix a few CONFIG symbol names in Kconfig files, bring in linux's <linux/time.h> conversion functions, poplar updates, bcb improvements.
| * | treewide: use linux/time.h for time conversion definesIgor Prusov2023-11-164-8/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | Now that we have time conversion defines from in time.h there is no need for each driver to define their own version. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91 Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2 Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | test: spl: Add a test for NANDSean Anderson2023-11-162-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a SPL test for the NAND load method. We use some different functions to do the writing from the main test since things like nand_write_skip_bad aren't available in SPL. We disable BBT scanning, since scan_bbt is only populated when not in SPL. We use nand_spl_loaders.c as it seems to be common to at least a few boards already. However, we do not use nand_spl_simple.c because it would require us to implement cmd_ctrl. The various nand load functions are adapted from omap_gpmc. However, they have been modified for simplicity/correctness. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* | nand: Add sandbox driverSean Anderson2023-11-163-0/+693
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a sandbox NAND flash driver to facilitate testing. This driver supports any number of devices, each using a single chip-select. The OOB data is stored in-band, with the separation enforced through the API. For now, create two devices to test with. The first is a very small device with basic ECC. The second is an 8G device (chosen to be larger than 32 bits). It uses ONFI, with the values copied from the datasheet. It also doesn't need too strong ECC, which speeds things up. Although the nand subsystem determines the parameters of a chip based on the ID, the driver itself requires devicetree properties for each parameter. We do not derive parameters from the ID because parsing the ID is non-trivial. We do not just use the parameters that the nand subsystem has calculated since that is something we should be testing. An exception is made for the ECC layout, since that is difficult to encode in the device tree and is not a property of the device itself. Despite using file I/O to access the backing data, we do not support using external files. In my experience, these are unnecessary for testing since tests can generally be written to write their expected data beforehand. Additionally, we would need to store the "programmed" information somewhere (complicating the format and the programming process) or try to detect whether block are erased at runtime (degrading probe speeds). Information about whether each page has been programmed is stored in an in-memory buffer. To simplify the implementation, we only support a single program per erase. While this is accurate for many larger flashes, some smaller flashes (512 byte) support multiple programs and/or subpage programs. Support for this could be added later as I believe some filesystems expect this. To test ECC, we support error-injection. Surprisingly, only ECC bytes in the OOB area are protected, even though all bytes are equally susceptible to error. Because of this, we take care to only corrupt ECC bytes. Similarly, because ECC covers "steps" and not the whole page, we must take care to corrupt data in the same way. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* | nand: Allow reinitializationSean Anderson2023-11-161-7/+33
| | | | | | | | | | | | | | | | NAND devices are destroyed in between unit tests. Provide a function to reinitialize the subsystem at the beginning of each test. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* | nand: Add function to unregister NAND devicesSean Anderson2023-11-161-0/+17
| | | | | | | | | | | | | | | | | | | | This performs the opposite of nand_register, allowing drivers to unregister nand devices. This is probably unnecessary for most regular drivers, but we expect sandbox drivers to get repeatedly bound/unbound, so this will help avoid dangling pointers. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* | mtd: Add some fallbacks for add/del_mtd_deviceSean Anderson2023-11-161-2/+0
| | | | | | | | | | | | | | | | This allows using these functions without ifdefs. OneNAND depends on MTD, so this ifdef was redundant in the first place. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* | spl: nand: Set bl_len to page sizeSean Anderson2023-11-1611-1/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 34793598c83 ("mtd: nand: mxs_nand_spl: Remove the page aligned access") there are no longer any users of nand_get_mtd. However, it is still important to know what the page size is so we can allocate a large-enough buffer. If the image size is not page-aligned, we will go off the end of the buffer and clobber some memory. Introduce a new function nand_page_size which returns the page size. For most drivers it is easy to determine the page size. However, a few need to be modified since they only keep the page size around temporarily. It's possible that this patch could cause a regression on some platforms if the offset is non-aligned and there is invalid address space immediately before the load address. spl_load_legacy_img does not (except when compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or SPL_LOAD_IMX_CONTAINER (none in tree) would be affected. defconfig CONFIG_TEXT_BASE ======================= ================ am335x_evm 0x80800000 am43xx_evm 0x80800000 am43xx_evm_rtconly 0x80800000 am43xx_evm_usbhost_boot 0x80800000 am43xx_hs_evm 0x80800000 dra7xx_evm 0x80800000 gwventana_nand 0x17800000 imx8mn_bsh_smm_s2 0x40200000 All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a little underflow. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* | nand: spl_loaders: Only read enough pages to load the imageSean Anderson2023-11-161-1/+4
| | | | | | | | | | | | | | | | | | | | All other implementations of nand_spl_load_image only read as many pages as are necessary to load the image. However, nand_spl_loaders.c loads the full block. Align it with other load functions so that it is easier to determine how large of a load buffer we need. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* | nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automaticallySean Anderson2023-11-167-17/+14
| | | | | | | | | | | | | | | | | | Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
* | nand: Don't dereference NULL manufacturer_descSean Anderson2023-11-161-5/+2
|/ | | | | | | | | When no manufacturer is matched, manufacturer_desc is NULL. Avoid dereferencing it in that case. Fixes: 4e67c571252 ("mtd,ubi,ubifs: sync with linux v3.15") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* Kconfig: Remove all default n/no optionsMichal Simek2023-10-301-1/+0
| | | | | | | | | | | | Similar change was done by commit b4c2c151b14b ("Kconfig: Remove all default n/no options") and again sync is required. default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
* mtd: nand: raw: rockchip_nfc: add NAND_SKIP_BBTSCAN optionJohan Jonker2023-10-242-0/+12
| | | | | | | | | | | On Rockchip SoCs the first boot stages are written on NAND with help of manufacturer software that uses a different format then the MTD framework. Skip the automatic BBT scan with the NAND_SKIP_BBTSCAN option to be able to pass the driver probe function and to let the original data unchanged. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* Merge branch 'next'Tom Rini2023-10-0219-1/+18
|\ | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
| * common: Drop linux/printk.h from common headerSimon Glass2023-09-2418-0/+18
| | | | | | | | | | | | | | | | | | This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * mtd: nand: raw: atmel: Remove duplicate lineAlexander Dahl2023-08-231-1/+0
| | | | | | | | | | Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* | mtd: nand: raw: atmel: Add error handling when rb-gpios missingAlexander Dahl2023-09-271-4/+7
|/ | | | | | | | | | | | | | | | | | | | | | | | | | Adapt behaviour to Linux kernel driver. The return value of gpio_request_by_name_nodev() was not checked before, and thus in case 'rb-gpios' was missing in DT, rb.type was set to ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for example (on sam9x60-curiosity with the line removed from dts): NAND: Could not find valid ONFI parameter page; aborting device found, Manufacturer ID: 0xc2, Chip ID: 0xdc Macronix NAND 512MiB 3,3V 8-bit 512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64 atmel-nand-controller nand-controller: NAND scan failed: -22 Failed to probe nand driver (err = -22) Failed to initialize NAND controller. (error -22) 0 MiB Note: not having that gpio assigned in dts is possible, the driver does not override nand_chip->dev_ready() then and a generic solution is used. Fixes: 6a8dfd57220d ("nand: atmel: Add DM based NAND driver") Signed-off-by: Alexander Dahl <ada@thorsis.com> Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: raw: rockchip_nfc: copy hwecc PA data to oob_poi bufferJohan Jonker2023-07-281-13/+21
| | | | | | | | | | | | | | | | Rockchip boot blocks are written per 4 x 512 byte sectors per page. Each page must have a page address (PA) pointer in OOB to the next page. Pages are written in a pattern depending on the NAND chip ID. This logic used to build a page pattern table is not fully disclosed and is not easy to fit in the MTD framework. The formula in rk_nfc_write_page_hwecc() function is not correct. Make hwecc and raw behavior identical. Generate boot block page address and pattern for hwecc in user space and copy PA data to/from the already reserved last 4 bytes before EEC in the chip->oob_poi data layout. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* mtd: nand: zynq_nand: Change datatype of status and ecc_status to intAlgapally Santosh Sagar2023-07-211-2/+2
| | | | | | | | | | | | | | status and ecc_status are of unsigned type where they are compared for negative value. This is pointed by below sparse warning. Change datatype to int to fix this. warning: comparison of unsigned expression in '< 0' is always false [-Wtype-limits] Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230614090359.10809-5-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
* mtd: nand: pxa3xx: Enable devbus/nand arbiter on Armada 8KChris Packham2023-07-131-1/+2
| | | | | | | | | | | | | | | | | The CN9130 SoC (an ARMADA 8K type) has both a NAND Flash Controller and a generic local bus controller (Device Bus Controller) that share common pins. With a board design that incorporates both a NAND flash and uses the Device Bus (in our case for an SRAM) accessing the Device Bus device fails unless the NfArbiterEn bit is set. Setting the bit enables arbitration between the Device Bus and the NAND flash. Since there is no obvious downside in enabling this for designs that don't require arbitration, we always enable it. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* mtd: nand: pxa3xx: Add support for the Marvell AC5 SoCChris Packham2023-07-131-3/+14
| | | | | | | | | The NAND flash controller (NFC) on the AC5/AC5X SoC is the same as the NFC used on other Marvell SoCs. It does have the additional restriction of only supporting SDR timing modes up to 3. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* global: Use proper project name U-BootMichal Simek2023-06-122-5/+5
| | | | | | | | | | | Use proper project name in comments, Kconfig, readmes. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
* drivers: use dev_read_addr_ptr when cast to pointerJohan Jonker2023-05-065-5/+5
| | | | | | | | | | | The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: use dev_read_addr_index_ptr when cast to pointerJohan Jonker2023-05-061-2/+2
| | | | | | | | | | | | The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_index_ptr instead of the dev_read_addr_index function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mtd: nand: add support for the Sandisk SDTNQGAMA chipJohan Jonker2023-05-061-0/+3
| | | | | | | | | | Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: raw: rockchip_nfc: fix oobfree offset and descriptionJohan Jonker2023-05-061-4/+4
| | | | | | | | | | | | The MTD framework reserves 1 or 2 bytes for the bad block marker depending on the bus size. The rockchip_nfc driver currently only supports a 8 bit bus, but reserves standard 2 bytes for the BBM. The first free OOB byte is therefore OOB2 at offset 2. Page address(PA) bytes are moved to the last 4 positions before ECC. Update the description for U-boot. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* mtd: nand: raw: rockchip_nfc: add flash_node to chip structureJohan Jonker2023-05-061-0/+1
| | | | | | | | | Add flash_node to the rockchip_nfc driver chip structure in order to find the partitions in the add_mtd_partitions_of() function. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: raw: rockchip_nfc: add layout structureJohan Jonker2023-05-061-41/+20
| | | | | | | | | | | The MTD framework in U-boot is not identical for drivers ported from Linux. The rockchip_nfc driver was ported with OOB ops functions while the framework expects a layout structure per chip. Fix by adding a structure with OOB data and remove unused functions. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: raw: rockchip_nfc: remove the compatible string "rockchip,rk3308-nfc"Johan Jonker2023-05-061-4/+0
| | | | | | | | | | | The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc". As there is no logic in probe priority between the SoC orientated string and the fall back, so remove the compatible string "rockchip,rk3308-nfc" from the driver. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: raw: rockchip_nfc: use dev_read_addr_ptrJohan Jonker2023-05-061-3/+3
| | | | | | | | | The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so use dev_read_addr_ptr in the rockchip_nfc.c file. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: nand: sunxi: Pass the device to the init functionSamuel Holland2023-04-281-19/+20
| | | | | | | | | This more closely matches the U-Boot driver to the Linux version. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Michael Trimarchi <micahel@amarulasolutions.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* mtd: nand: sunxi: Convert to the driver modelSamuel Holland2023-04-281-33/+48
| | | | | | | | | | | | Clocks, resets, and pinmuxes are now handled by the driver model, so the only thing the "board" code needs to do is load the driver. This matches the pattern used by other DM raw NAND drivers (there is no NAND uclass). The actual board code is now only needed in SPL. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* mtd: nand: sunxi: Convert from fdtdec to ofnodeSamuel Holland2023-04-281-47/+26
| | | | | | | | | | | | As a first step toward converting this driver to the driver model, use the ofnode abstraction to replace direct references to the FDT blob. Using ofnode_read_u32_index removes an extra pair of loops and makes the allwinner,rb property optional, matching the devicetree binding. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* mtd: nand: sunxi: Remove an unnecessary checkSamuel Holland2023-04-281-10/+0
| | | | | | | | | Each chip is required to have a unique CS number ("reg" property) in the range 0-7, so there is no need to separately count the number of chips. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* Merge tag 'u-boot-stm32-20230419' of ↵Tom Rini2023-04-221-0/+3
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm configs: _ Add usb_pgood_delay for ST boards _ increase malloc size for pre-reloc for stm32mp15 _ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15 dts: _ Add QSPI support on STM32MP13x SoC family _ Add FMC support on STM32MP13x SoC family drivers/machine: _ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing() _ spi: stm32_qspi: Remove useless struct stm32_qspi_flash _ rawnand: stm32_fmc2: remove unsupported EDO mode _ stm32mp: fix various array bounds checks
| * mtd: rawnand: stm32_fmc2: remove unsupported EDO modeChristophe Kerello2023-04-191-0/+3
| | | | | | | | | | | | | | | | Remove the EDO mode support from as the FMC2 controller does not support the feature. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | mtd: rawnand: nand_base: Handle algorithm selectionLinus Walleij2023-04-221-4/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the D-Link DIR-885L and DIR-890L routers, we need to explicitly select the ECC like this in the device tree: nand-ecc-algo = "bch"; nand-ecc-strength = <1>; nand-ecc-step-size = <512>; This is handled by the Linux kernel but U-Boot core does not respect this. Fix it up by parsing the algorithm and preserve the behaviour using this property to select software BCH as far as possible. Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Acked-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm] Link: https://lore.kernel.org/all/20230407134008.1939717-3-linus.walleij@linaro.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* | Revert "mtd: rawnand: nand_base: Handle algorithm selection"Dario Binacchi2023-04-221-9/+3
|/ | | | | | | | | It will be replaced by a more recent version which contains fixes for tests run by Tom Rini. This reverts commit ff33d3c87c2a1ab576607c2f67a9cb7690a4e7ca. Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* nand: raw: octeontx: Make list staticBin Meng2023-04-162-2/+2
| | | | | | | | | | octeontx_bch_devices and octeontx_pci_nand_deferred_devices are only referenced in the files where they are defined. Make them static. Signed-off-by: Bin Meng <bmeng@tinylab.org> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20230405143837.785082-1-bmeng@tinylab.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-21 17:23:22 +0000