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* fsl-layerscape/soc.c: do not destroy bootcmd environmentMike Looijmans2024-02-081-0/+5
| | | | | | | | | When an XXX_BOOTCOMMAND isn't defined, the result is that bootcmd is set to some random memory content. Fix it so that the function does nothing in that case and leaves the bootcmd environment unmodified. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
* Revert "arm64: Use FEAT_HAFDBS to track dirty pages when available"Chris Packham2023-11-171-15/+1
| | | | | | | | | | This reverts commit 6cdf6b7a340db4ddd008516181de7e08e3f8c213. This is part of a series trying to make use of the arm64 hardware features for tracking dirty pages. Unfortunately this series causes problems for the AC5/AC5X SoCs. Having exhausted other options the consensus seems to be reverting this series is the best course of action. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* Revert "arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is ↵Chris Packham2023-11-171-10/+4
| | | | | | | | | | | | present" This reverts commit 836b8d4b205d2175b57cb9ef271e638b0c116e89. This is part of a series trying to make use of the arm64 hardware features for tracking dirty pages. Unfortunately this series causes problems for the AC5/AC5X SoCs. Having exhausted other options the consensus seems to be reverting this series is the best course of action. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* Revert "armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present"Chris Packham2023-11-171-5/+1
| | | | | | | | | | This reverts commit c1da6fdb5c239b432440721772d993e63cfdeb20. This is part of a series trying to make use of the arm64 hardware features for tracking dirty pages. Unfortunately this series causes problems for the AC5/AC5X SoCs. Having exhausted other options the consensus seems to be reverting this series is the best course of action. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* sunxi: refactor serial base addresses to avoid asm/arch/cpu.hAndre Przywara2023-10-221-0/+1
| | | | | | | | | | | | | | | | At the moment we have each SoC's memory map defined in its own cpu.h, which is included in include/configs/sunxi_common.h. This will be a problem with the introduction of Allwinner RISC-V support. Remove the inclusion of that header file from the common config header, instead move the required serial base addresses (for the SPL) into a separate header file. Then include the original cpu.h file only where we really need it, which is only under arch/arm now. This disentangles the architecture specific header files from the generic code. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* armv8: fsl-layerscape: make some functions staticLaurentiu Tudor2023-10-101-6/+6
| | | | | | | Some functions are not used outside this file, so make them static. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* fsl-layerscape: drop obsolete PPA secure firmware supportLaurentiu Tudor2023-10-104-379/+0
| | | | | | | | | PPA was a secure firmware developed in-house which is no longer supported and replaced by TF-A quite some years ago. Drop support for it. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDRSimon Glass2023-10-061-1/+1
| | | | | | | | Rename this so that SPL is first, as per U-Boot convention. Also add PAYLOAD_ since this is where in memory the parameters for the payload have been stored. Signed-off-by: Simon Glass <sjg@chromium.org>
* freescale: Drop call to init_func_vid() in the init sequenceSimon Glass2023-08-311-0/+5
| | | | | | | | Use the misc_init_f event instead, which is designed for this purpose. All boards with CONFIG_VID already enable CONFIG_EVENT. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge tag 'v2023.10-rc3' into nextTom Rini2023-08-212-6/+56
|\ | | | | | | | | | | Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
| * arm64: fsl: layerscape: Remove unused functionsShenlin Liang2023-08-091-5/+0
| | | | | | | | | | | | | | | | Function board_switch_core_volt has not been used since it was defined Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * arm64: smccc: add support for SMCCCv1.2 x0-x17 registersAbdellatif El Khlifi2023-08-081-1/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | armv8: Skip PIE in SPL due to load alignment fault.Kevin Chen2023-08-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start and _rel_dyn_end symbol to be loaded to and executed at a different address than it was linked at. u-boot-spl.lds is used in SPL build, but relocation information section(.rela*) were discarded. In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds /DISCARD/ : { *(.rela*) } If PIE enabled in SPL, __rel_dyn_start which is defined as .rel_dyn_start in sections.c will be apended to the end of .bss section. In our ASPEED case, size of .bss section would let .rel_dyn_start without 8-byte alignment, leading to alignment fault when executing ldp instuction in pie_fix_loop. Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
* | Kconfigs: Correct default of "0" on hex type entriesTom Rini2023-08-091-1/+1
|/ | | | | | | | | | | | | | It is not a parse error to have a default value of "0" for a "hex" type entry, instead of "0x0". However, "0" and "0x0" are not treated the same even by the tools themselves. Correct this by changing the default value from "0" to "0x0" for all hex type questions that had the incorrect default. Fix one instance (in two configs) of a default of "0" being used on a hex question to be "0x0". Remove the cases where a defconfig had set a value of "0x0" to be used as the default had been "0". Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arch: arm: fsl-layerscape: allow "opt-out" of fsl_setenv_bootcmdMathew McBride2023-08-031-1/+1
| | | | | | | | | | | | | | | | | | | Allow individual Layerscape boards to opt-out of fsl_setenv_bootcmd by declaring the original function as weak. fsl_setenv_bootcmd is used to change the bootcmd based on the TF-A boot source (e.g QSPI vs SD/MMC) for reasons including secure boot / integrity measurements and DPAA2 configuration loading. See previous discussion at [1]. On the Ten64 board, our bootcmd is the same across all TF-A boot sources so we don't want this behaviour. Signed-off-by: Mathew McBride <matt@traverse.com.au> [1] https://patchwork.ozlabs.org/project/uboot/patch/20211110044639.7070-3-matt@traverse.com.au/#2790037 Reviewed-by: Peng Fan <peng.fan@nxp.com>
* Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"Tom Rini2023-07-241-56/+1
| | | | | | | | | This reverts commit d927d1a80843e1c3e2a3f0b8f6150790bef83da1, reversing changes made to c07ad9520c6190070513016fdb495d4703a4a853. These changes do not pass CI currently. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm64: smccc: add support for SMCCCv1.2 x0-x17 registersAbdellatif El Khlifi2023-07-241-1/+56
| | | | | | | | | | | | | | | | | | | add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* global: Use proper project name U-BootMichal Simek2023-06-122-2/+2
| | | | | | | | | | | Use proper project name in comments, Kconfig, readmes. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Qu Wenruo <wqu@suse.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
* armv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jrMathew McBride2023-05-051-0/+4
| | | | | | | | | | | | | | | | | | This a problem I found while updating the U-Boot fsl-ls1088a.dtsi to match the Linux version. fdt_fixup_remove_jr did not check whether there was a "crypto" alias in the device tree before calling more fdt_* functions, which resulted in a crash. Fixes: a797f274 ("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number") Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
* arm: Centralize fixed register logicTom Rini2023-04-251-1/+0
| | | | | | | | | | | | When building for ARM64, we need to pass -ffixed-x18 and otherwise pass -ffixed-r9. Rather than having this logic in two places, we can do this once in arch/arm/config.mk. Further, while gcc will ignore being passed both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will note that -ffixed-r9 is not used. Remove this duplication to also remove the warning. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is presentmeitao2023-04-251-1/+5
| | | | | | | | | | | | u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does. otherwise it will hang when enable mmu, that is what we encounter in our SOC. Signed-off-by: meitao <meitaogao@asrmicro.com> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/3bf38943aeab4700c2319bff2a1477d99c6afd2f
* arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is presentMarc Zyngier2023-04-251-4/+10
| | | | | | | | | | | | | In order to make invalidation by VA more efficient, set the largest block mapping to 2MB, mapping it onto level-2. This has no material impact on u-boot's runtime performance, and allows a huge speedup when cleaning the cache. Signed-off-by: Marc Zyngier <maz@kernel.org> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8
* arm64: Use FEAT_HAFDBS to track dirty pages when availableMarc Zyngier2023-04-251-1/+15
| | | | | | | | | | | | | Some recent arm64 cores have a facility that allows the page table walker to track the dirty state of a page. This makes it really efficient to perform CMOs by VA as we only need to look at dirty pages. Signed-off-by: Marc Zyngier <maz@kernel.org> [ Paul: pick from the Android tree. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263
* arm64: Reduce PT size estimation complexityMarc Zyngier2023-03-061-75/+34
| | | | | | | | | | | | | | | | | | | | count_required_pts()'s complexity is high if mappings are not using the largest possible block size (due to some other requirement such as tracking dirty pages, for example). Let's switch to a method that follows the pattern established with the add_map() helper, and make it almost instantaneous instead of taking a large amount of time if 2MB mappings are in use instead of 1GB. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Pierre-Clément Tosi <ptosi@google.com> [ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/5d756d147e31a1cdaaa261a50e526404ca5968f5 Link: https://android.googlesource.com/platform/external/u-boot/+/6be9330601d81545c7c941e3609f35bf68a09059
* arm64: Reduce add_map() complexityMarc Zyngier2023-03-061-48/+46
| | | | | | | | | | | | | | | | | | | | | | In the add_map() function, for each level it populates, it iterates from the root of the PT tree, making it ineficient if a mapping needs to occur past level 1. Instead, replace it with a recursive (and much simpler) algorithm that keeps the complexity as low as possible. With this, mapping 512GB at level 2 goes from several seconds down to not measurable on an A55 machine. We keep the block mappings at level 1 for now though. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Pierre-Clément Tosi <ptosi@google.com> [ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the upstream ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/96ad729cf4cab53bdff8222bb3eb256f38b5c3a6 Link: https://android.googlesource.com/platform/external/u-boot/+/6be9330601d81545c7c941e3609f35bf68a09059
* arm: cpu: Add optional CMOs by VAMarc Zyngier2023-03-064-26/+155
| | | | | | | | | | | | | | | | | | | | | | | | Exposing set/way cache maintenance to a virtual machine is unsafe, not least because the instructions are not permission-checked but also because they are not broadcast between CPUs. Consequently, KVM traps and emulates such maintenance in the host kernel using by-VA operations and looping over the stage-2 page-tables. However, when running under protected KVM, these instructions are not able to be emulated and will instead result in an exception being delivered to the guest. Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select this option and perform by-VA cache maintenance instead of using the set/way instructions. Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Will Deacon <willdeacon@google.com> Signed-off-by: Pierre-Clément Tosi <ptosi@google.com> [ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some checkpatch warnings. Rebased to upstream. ] Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Link: https://android.googlesource.com/platform/external/u-boot/+/db5507f47f4f57f766d52f753ff2cc761afc213b Link: https://android.googlesource.com/platform/external/u-boot/+/2baf54e743380a1e4a6bc2dbdde020a2e783ff67
* Correct SPL use of SYS_FSL_ERRATUM_A010539Simon Glass2023-02-101-1/+1
| | | | | | | This converts 1 usage of this option to the non-SPL form, since there is no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: Drop unused CONFIG_S32V234Simon Glass2023-02-071-1/+0
| | | | | | This option does not exist, so the Makefile rule does nothing. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: psci: Fix RESET2 hookMarek Vasut2023-01-312-1/+3
| | | | | | | The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly. Add missing handler for the RESET2 hook, so it can be implemented by U-Boot. Signed-off-by: Marek Vasut <marex@denx.de>
* sunxi: armv8: fel: load only 32-bit valuesAndre Przywara2023-01-211-4/+4
| | | | | | | | | | | | Both the values and the MMIO addresses that we need during the 64-bit FEL restore are smaller than 2^32, so we don't need to do any 64-bit loads. Change the loads to only load 32 bits worth of data, that saves us some bytes for storing the values. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Tested-by: Samuel Holland <samuel@sholland.org>
* global: Finish CONFIG -> CFG migrationTom Rini2023-01-201-83/+83
| | | | | | | | | | | | | At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* nxp: Finish migration of SYS_FSL_SRDS_[12] to KconfigTom Rini2023-01-201-9/+0
| | | | | | | | As this is used on both ARM and PowerPC platforms, this needs to be listed in arch/Kconfig.nxp and match how they're currently used by select'ing them under the required PowerPC ARCH_xxx options. Signed-off-by: Tom Rini <trini@konsulko.com>
* nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to KconfigTom Rini2023-01-201-7/+0
| | | | | | | | | As this is used on both ARM and PowerPC platforms, this needs to be asked in arch/Kconfig.nxp. Set the PowerPC defaults based on arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in drivers/mtd/nand/raw/fsl_ifc_nand.c Signed-off-by: Tom Rini <trini@konsulko.com>
* fsl-layerscape: Rework usage of CONFIG_CLUSTER_CLK_FREQTom Rini2023-01-201-3/+4
| | | | | | | In the case where CONFIG_CLUSTER_CLK_FREQ is not defined, simply set cluster_clk to get_board_sys_clk(). Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Rework usage of CONFIG_ARMV[78]_SECURE_BASE in linker scriptsTom Rini2023-01-201-2/+4
| | | | | | | | | In order to avoid defining CONFIG_ARMV[78_]SECURE_BASE as empty in the linker scripts, if not already defined, add and use __ARMV[78_]SECURE_BASE for when the base is not defined and we want the linker scripts to continue. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Support trace on armv8Simon Glass2023-01-181-3/+3
| | | | | | | Use the notrace attribute so that timer functions can be used when tracing. This is required to avoid infinite loops when recording a trace. Signed-off-by: Simon Glass <sjg@chromium.org>
* configs: Remove unused or redundant CONFIG symbolsTom Rini2022-12-231-0/+1
| | | | | | | | | A number of CONFIG symbols have crept in that are never referenced in code, so drop them here. Further, we have two symbols being enabled in headers while already enabled correctly in Kconfig, so these lines can also be removed. Signed-off-by: Tom Rini <trini@konsulko.com>
* global: Migrate CONFIG_MAX_MEM_MAPPED to CFGTom Rini2022-12-231-3/+3
| | | | | | Perform a simple rename of CONFIG_MAX_MEM_MAPPED to CFG_MAX_MEM_MAPPED Signed-off-by: Tom Rini <trini@konsulko.com>
* net: Remove more legacy functionsTom Rini2022-12-221-3/+0
| | | | | | Remove some of the board and arch specific non-DM_ETH helper code. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: Use the WEAK assembly entry point consistentlyTom Rini2022-12-061-8/+4
| | | | | | | | | | | It is a bad idea, and more modern toolchains will fail, if you declare an assembly function to be global and then weak, instead of declaring it weak to start with. Update assorted assembly files to use the WEAK macro directly. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Pali Rohár <pali@kernel.org>
* global: Move remaining CONFIG_SYS_* to CFG_SYS_*Tom Rini2022-12-057-37/+37
| | | | | | | | | | The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*Tom Rini2022-12-051-3/+3
| | | | | | | | | | The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Convert CONFIG_SYS_PMAN et al to KconfigTom Rini2022-12-055-9/+7
| | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_NOBQFMAN CONFIG_SYS_DPAA_DCE CONFIG_SYS_DPAA_FMAN CONFIG_SYS_DPAA_PME CONFIG_SYS_DPAA_RMAN CONFIG_SYS_PMAN Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* global: Move remaining CONFIG_SYS_PCI* to CFG_SYS_PCI*Tom Rini2022-12-051-23/+23
| | | | | | | | | | The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* global: Move remaining CONFIG_SYS_NS16550_* to CFG_SYS_NS16550_*Tom Rini2022-12-051-1/+1
| | | | | | | | | | The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550 namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespaceTom Rini2022-11-1012-82/+82
| | | | | | | Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASESimon Glass2022-10-312-2/+2
| | | | | | | | | The current name is inconsistent with SPL which uses CONFIG_SPL_TEXT_BASE and this makes it imposible to use CONFIG_VAL(). Rename it to resolve this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: layerscape: Disable unused parts of ICID tablesSean Anderson2022-10-181-0/+2
| | | | | | | | | Several parts of the ICID table are only necessary for U-Boot proper. Disable them in SPL. This saves around 500 bytes. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* arm: layerscape: Don't select FSL_IFC when booting from SD cardSean Anderson2022-10-181-2/+2
| | | | | | | | | FSL_IFC should only be selected when booting from NAND flash (or when NAND_FSL_IFC is enabled). The existing logic does this correctly when QSPI is also enabled, but not when just booting from SD. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* arm64: layerscape: Support SYSRESETSean Anderson2022-10-171-0/+2
| | | | | | | | CONFIG_SYSRESET provides its own implementation of reset_cpu. Disable our version when it is enabled. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-21 19:49:12 +0000