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Diffstat (limited to 'drivers/ddr/imx/imx8ulp/Kconfig')
| -rw-r--r-- | drivers/ddr/imx/imx8ulp/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/ddr/imx/imx8ulp/Kconfig b/drivers/ddr/imx/imx8ulp/Kconfig index e56062a1d0..42848863aa 100644 --- a/drivers/ddr/imx/imx8ulp/Kconfig +++ b/drivers/ddr/imx/imx8ulp/Kconfig @@ -8,4 +8,11 @@ config IMX8ULP_DRAM_PHY_PLL_BYPASS bool "Enable the DDR PHY PLL bypass mode, so PHY clock is from DDR_CLK " depends on IMX8ULP_DRAM +config SAVED_DRAM_TIMING_BASE + hex "Define the base address for saved dram timing" + help + The DRAM config timing data need to be saved into sram + for low power use. + default 0x2006c000 + endmenu |