diff options
Diffstat (limited to 'arch/arm/mach-tegra/tegra30/clock.c')
| -rw-r--r-- | arch/arm/mach-tegra/tegra30/clock.c | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 698c7ab956..0af8cde8c6 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -438,6 +438,8 @@ struct clk_pll_info tegra_pll_info_table[CLOCK_ID_PLL_COUNT] = { .lock_ena = 9, .lock_det = 11, .kcp_shift = 6, .kcp_mask = 3, .kvco_shift = 0, .kvco_mask = 1 }, /* PLLE */ { .m_shift = 0, .m_mask = 0x0F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07, .lock_ena = 18, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLS (RESERVED) */ + { .m_shift = 0, .m_mask = 0x1F, .n_shift = 8, .n_mask = 0x3FF, .p_shift = 20, .p_mask = 0x07, + .lock_ena = 22, .lock_det = 27, .kcp_shift = 8, .kcp_mask = 0xF, .kvco_shift = 4, .kvco_mask = 0xF }, /* PLLD2 */ }; /* @@ -654,6 +656,9 @@ enum clock_id clk_id_to_pll_id(int clk_id) case TEGRA30_CLK_PLL_D: case TEGRA30_CLK_PLL_D_OUT0: return CLOCK_ID_DISPLAY; + case TEGRA30_CLK_PLL_D2: + case TEGRA30_CLK_PLL_D2_OUT0: + return CLOCK_ID_DISPLAY2; case TEGRA30_CLK_PLL_X: return CLOCK_ID_XCPU; case TEGRA30_CLK_PLL_E: @@ -871,6 +876,23 @@ int tegra_plle_enable(void) return 0; } +struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid) +{ + struct clk_rst_ctlr *clkrst = + (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + + switch (clkid) { + case CLOCK_ID_XCPU: + case CLOCK_ID_EPCI: + case CLOCK_ID_SFROM32KHZ: + return &clkrst->crc_pll_simple[clkid - CLOCK_ID_FIRST_SIMPLE]; + case CLOCK_ID_DISPLAY2: + return &clkrst->plld2; + default: + return NULL; + } +} + struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SBC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC2, CLOCK_ID_PERIPH }, |