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authorJohan Jonker <jbx6244@gmail.com>2023-03-13 01:32:31 +0100
committerKever Yang <kever.yang@rock-chips.com>2023-05-06 17:28:18 +0800
commit320a1938b6f7ea1ad89f7e18c7fef5898f98fc5b (patch)
treed15c2494b33e150f078044dbae9f8d284416150a /drivers/spi/cadence_qspi.c
parent842fb5de424e53d097230a1d0ab6d7ba39b446c7 (diff)
drivers: use devfdt_get_addr_index_ptr when cast to pointer
The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/spi/cadence_qspi.c')
-rw-r--r--drivers/spi/cadence_qspi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index ac81468a18..2d715e478c 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -389,7 +389,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
struct cadence_spi_priv *priv = dev_get_priv(bus);
ofnode subnode;
- plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
+ plat->regbase = devfdt_get_addr_index_ptr(bus, 0);
plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);