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authorTudor Ambarus <tudor.ambarus@microchip.com>2021-11-03 19:07:40 +0200
committerEugen Hristev <eugen.hristev@microchip.com>2021-12-07 12:22:34 +0200
commit79eeb91693c6069ed315a871772a28751b16376a (patch)
tree5e788356ef3df54074eb185e30b6174893e44e74 /drivers/ddr/fsl/arm_ddr_gen3.c
parent2fd1b97f33c91e9878d24a0f251ba0d2104e9e71 (diff)
ARM: dts: at91: sama7g5: Add QSPI0 and OSPI1 nodes
sama7g5 embedds an OSPI and a QSPI controller: 1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash and OctaFlash Protocols Supported. 2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/ddr/fsl/arm_ddr_gen3.c')
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