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authorTom Rini <trini@konsulko.com>2020-04-16 08:56:37 -0400
committerTom Rini <trini@konsulko.com>2020-04-16 08:56:37 -0400
commitdba0a6ae1907bbff3ebda06e4874d006f10db1bb (patch)
tree61d65db08c42dcf0d64d8c084c026d52c9beb3af /arch/x86/include/asm/intel_pinctrl_defs.h
parent66b8669d7709cecedf2e0403bb17b48bab86f644 (diff)
parent1f4431e46120ef913fc9f83c78a734d910d00b3f (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Provide serial base clock speed via getinfo() for ACPI SPCR - Initial ACPI support from DM core by leveraging existing ACPI support in x86
Diffstat (limited to 'arch/x86/include/asm/intel_pinctrl_defs.h')
-rw-r--r--arch/x86/include/asm/intel_pinctrl_defs.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/x86/include/asm/intel_pinctrl_defs.h b/arch/x86/include/asm/intel_pinctrl_defs.h
index 6da06bb52b..1ea141f082 100644
--- a/arch/x86/include/asm/intel_pinctrl_defs.h
+++ b/arch/x86/include/asm/intel_pinctrl_defs.h
@@ -1,7 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
- * This file is part of the coreboot project.
- *
* Copyright (C) 2015-2016 Intel Corp.
* Copyright 2019 Google LLC
*