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* mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()Takahiro Kuwano2024-01-291-0/+1
| | | | | | | | | | | | | Enabling Octal DTR mode in multi-die package parts requires reister setup for each die. That can be done by simple for-loop. write_enable() takes effect to all die at once so we can call it before the loop. Besides we can replace spi_mem_exec_op() calls with spansion_read/write_any_reg(). And finally, we must mask CFR2V[7:4] when changing dummy cycles, as CFR2V[7] indicates current addressing mode and that should be 1 (4-byte address mode) for multi-die package parts. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28Takahiro Kuwano2024-01-291-0/+1
| | | | | | | | | | | | | Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode. Instead, it supports CLPEF(0x82) which has the same functionality as CLSR. spansion_sr_ready() is for multi-die package parts including S28HS02GT, so we need to use CLPEF instead of CLSR. This change does not affect to S25x02GT which uses spansion_sr_ready() as S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30). Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28Takahiro Kuwano2024-01-291-1/+0
| | | | | | | | | s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector layout (32 x 4KB sectors overlaid at bottom address) and doing same thing. Consolidate them into single helper named s25_s28_erase_non_uniform(). Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28Takahiro Kuwano2024-01-291-8/+3
| | | | | | | | | Some macro definitions used in Infineon(Cypress) S25 and S28 series are redundant and some have inconsistent prefix. This patch removes redundant ones and renames some to have same prefix as others. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* qe: Add <config.h> to linux/immap_qe.hTom Rini2023-12-211-0/+2
| | | | | | | | Given how we define QE_MURAM_SIZE today, this header needs to have <config.h> added to it. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi ↵Tom Rini2023-12-181-0/+1
|\ | | | | | | | | | | | | into next - spi_nor_read_sfdp_dma_unsafe (Vaishnav) - w25q01/02 (Jim)
| * mtd: spinand: add support for ESMT F50x1G41LBIgor Prusov2023-12-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adaptation of Linux commit d74c36480a67 This patch adds support for ESMT F50L1G41LB and F50D1G41LB. It seems that ESMT likes to use random JEDEC ID from other vendors. Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from Micron. For this reason, the ESMT entry is named esmt_c8 with explicit JEDEC ID in variable name. Datasheets: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Tested-by: Martin Kurbanov <mmkurbanov@sberdevices.ru> Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* | Merge tag 'v2024.01-rc3' into nextTom Rini2023-11-207-7/+7
|\| | | | | | | Prepare v2024.01-rc3
| * tree-wide: Replace http:// link with https:// link for ti.comNishanth Menon2023-11-107-7/+7
| | | | | | | | | | | | Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
* | Merge branch '2023-11-16-assorted-updates' into nextTom Rini2023-11-171-0/+9
|\ \ | | | | | | | | | | | | | | | | | | - squashfs improvements, remove common.h in some places, assorted code fixes, fix a few CONFIG symbol names in Kconfig files, bring in linux's <linux/time.h> conversion functions, poplar updates, bcb improvements.
| * | linux/time.h: Add Linux time conversion definesIgor Prusov2023-11-161-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are no defines for time conversion in time.h, which leads to drivers declaring those locally or not using defines at all, so add them from Linux. Signed-off-by: Igor Prusov <ivprusov@salutedevices.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | Merge patch series "nand: Add sandbox tests"Tom Rini2023-11-161-0/+12
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To quote the author: This series tests raw nand flash in sandbox and fixes various bugs discovered in the process. I've tried to do things in a contemporary manner, avoiding the (numerous) variations present on only a few boards. The test is pretty minimal. Future work could test the rest of the nand API as well as the MTD API. Bloat (for v1) at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost everything grows by a few bytes due to nand_page_size. A few boards grow more, mostly those using nand_spl_loaders.c. CI at [2]. [1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2 [2] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18443
| * | mtd: Add some fallbacks for add/del_mtd_deviceSean Anderson2023-11-161-0/+12
| |/ | | | | | | | | | | | | | | This allows using these functions without ifdefs. OneNAND depends on MTD, so this ifdef was redundant in the first place. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* | include: Drop <common.h> from include listsTom Rini2023-11-072-2/+0
| | | | | | | | | | | | | | | | | | | | At this point, we don't need to have <common.h> be included because of properties in the header itself, it only includes other common header files. We've also audited the code enough at this point that we can drop <common.h> from being included in headers and rely on code to have the correct inclusions themselves, or at least <common.h>. Signed-off-by: Tom Rini <trini@konsulko.com>
* | include/linux/mii.h: Add <linux/types.h>Tom Rini2023-11-071-0/+2
|/ | | | | | As this file uses u8/u16 we need to bring in <linux/types.h> here. Signed-off-by: Tom Rini <trini@konsulko.com>
* mtd/spinand: sync supported devices with linux-5.15.43Mikhail Kshevetskiy2023-10-132-1/+35
| | | | | | | | | | | | | | This adds more supported spinand devices from the Linux kernel implementation. This does not include the latest kernel implementation as this would require a substantial amount of extra work due to the missing ECC engine abstraction layer in U-Boot. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> (commit message) Link: https://lore.kernel.org/all/20230110115843.391630-3-frieder@fris.de Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* mtd/spinand: rework detect procedure for different READ_ID operationMikhail Kshevetskiy2023-10-131-22/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently there are 3 different variants of read_id implementation: 1. opcode only. Found in GD5FxGQ4xF. 2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E 3. opcode + 1 dummy byte. Found in other currently supported chips. Original implementation was for variant 1 and let detect function of chips with variant 2 and 3 to ignore the first byte. This isn't robust: 1. For chips of variant 2, if SPI master doesn't keep MOSI low during read, chip will get a random id offset, and the entire id buffer will shift by that offset, causing detect failure. 2. For chips of variant 1, if it happens to get a devid that equals to manufacture id of variant 2 or 3 chips, it'll get incorrectly detected. This patch reworks detect procedure to address problems above. New logic do detection for all variants separatedly, in 1-2-3 order. Since all current detect methods do exactly the same id matching procedure, unify them into core.c and remove detect method from manufacture_ops. This is a rework of Chuanhong Guo <gch981213@gmail.com> patch submitted to linux kernel Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Link: https://lore.kernel.org/all/20230110115843.391630-1-frieder@fris.de Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
* linux/compat.h: Define empty __initconst and __initdataMarek Vasut2023-10-011-0/+2
| | | | | | | Introduce two new empty macros used in various static tables in Linux. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* common: Drop linux/printk.h from common headerSimon Glass2023-09-241-0/+1
| | | | | | | | | This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* board: usb: Replace legacy usb_gadget_handle_interrupts()Marek Vasut2023-09-151-1/+1
| | | | | | | | | | | | | | | The usb_gadget_handle_interrupts() is no longer used anywhere, replace the remaining uses with dm_usb_gadget_handle_interrupts() which takes udevice as a parameter. Some of the UDC drivers currently ignore the index parameter altogether, those also ignore the udevice and have to be reworked. Other like the dwc3_uboot_handle_interrupt() had to be switched from index to udevice look up to avoid breakage. Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3 Signed-off-by: Marek Vasut <marex@denx.de>
* dm: usb: udc: Drop legacy udevice handler functionsMarek Vasut2023-09-151-17/+0
| | | | | | | | | | | | Remove legacy functions limited by the dev_array array, those are no longer used anywhere, all the code uses plain udevice based access now. The usb_gadget_handle_interrupts() is doing udevice look up until all call sites use dm_usb_gadget_handle_interrupts(). Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Marek Vasut <marex@denx.de>
* dm: usb: udc: Factor out plain udevice handler functionsMarek Vasut2023-09-151-0/+17
| | | | | | | | | | Pull the functionality of UDC uclass that operates on plain udevice and does not use this dev_array array into separate functions and expose those functions, so that as much code as possible can be switched over to these functions and the dev_array can be dropped. Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Signed-off-by: Marek Vasut <marex@denx.de>
* arm64: smccc: add support for SMCCCv1.2 x0-x17 registersAbdellatif El Khlifi2023-08-081-0/+45
| | | | | | | | | | | | | | | | | | | add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* phy: rockchip: add usbdp combo phy driverFrank Wang2023-07-281-0/+70
| | | | | | | | | | This adds a new USBDP combo PHY with Samsung IP block driver. The PHY is a combo between USB 3.0 and DisplayPort alt mode. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> [eugen.hristev@collabora.com: ported to 2023.07, clean-up] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* common: define time_t as 64bitHeinrich Schuchardt2023-07-251-1/+1
| | | | | | To avoid the year 2038 problem time_t must be 64bit on all architectures. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
* Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"Tom Rini2023-07-241-45/+0
| | | | | | | | | This reverts commit d927d1a80843e1c3e2a3f0b8f6150790bef83da1, reversing changes made to c07ad9520c6190070513016fdb495d4703a4a853. These changes do not pass CI currently. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm64: smccc: add support for SMCCCv1.2 x0-x17 registersAbdellatif El Khlifi2023-07-241-0/+45
| | | | | | | | | | | | | | | | | | | add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* linux/unaligned: remove unused access_ok.hJens Wiklander2023-05-311-66/+0
| | | | | | | linux/unaligned/access_ok.h is unused, so remove it. Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
* include: Remove unused header filesTom Rini2023-05-313-360/+0
| | | | | | | | As part of various code clean-ups we have on occasion missed removing unused header files. None of these files are referenced anywhere else at this point. Signed-off-by: Tom Rini <trini@konsulko.com>
* Fix sparse checks processingChristophe Leroy2023-05-152-39/+9
| | | | | | | | | | | | | | | | | | | | | | A lot of errors are encountered when building with sparse checking activated (make C=1 or make C=2). Many of them are fixed in Linux. Resynchronise Makefile and include/linux/build_bug.h with Linux kernel sources by porting the following Linux commits into u-boot: - 6c49f359ca14 ("kbuild: disable sparse warnings about unknown attributes") - 80591e61a0f7 ("kbuild: tell sparse about the $ARCH") - 8788994376d8 ("linux/build_bug.h: change type to int") - 527edbc18a70 ("build_bug.h: remove most of dummy BUILD_BUG_ON stubs for Sparse") - c60d3b79423a ("build_bug.h: remove negative-array fallback for BUILD_BUG_ON()") - 14e83077d55f ("include: drop pointless __compiler_offsetof indirection") Also revert commit aa9e891c63 ("include/linux/stddef.h: avoid 'warning: preprocessor token offsetof redefined'") because the error it creates is worse than the warning it is trying to fix. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
* net: phy: Add MDIO PCS 2.5G and 5G speed macros from LinuxMarek Vasut2023-04-071-0/+18
| | | | | | | | | Add MDIO PCS 2.5G and 5G speed macros from Linux 5.1.y as of commit 7fd8afa8933a0 ("net: phy: Add generic support for 2.5GBaseT and 5GBaseT") This is used by the upcoming Marvell 10G PHY driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* include: kernel.h: port find_closest() from LinuxChris Packham2023-03-301-0/+24
| | | | | | | | | The find_closest() macro can be used to find an element in a sorted array that is closest to an input value. Bring in this macro from Linux v6.3-rc1-2-g8ca09d5fa354. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Correct SPL uses of SANDBOX_CLK_CCFSimon Glass2023-02-101-3/+3
| | | | | | | This converts 12 usages of this option to the non-SPL form, since there is no SPL_SANDBOX_CLK_CCF defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org>
* mtd: Drop unused fsmc_nand driverSimon Glass2023-02-071-84/+0
| | | | | | | | | | | This is not used since this commit: 570c3dcfc15 arm: Remove spear600 boards and the rest of SPEAr support Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: Drop unused fsl_upm driverSimon Glass2023-02-071-44/+0
| | | | | | | | | | | This is not used since this commit: 8d1e3cb1400 powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS support Drop the driver and Kconfig option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com>
* mtd: spi-nor: Add support for Infineon s25fs256tTakahiro Kuwano2023-01-261-0/+1
| | | | | | | | | | | | Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and differences comparing to other Spansion/Cypress flash familes are: - 4-byte address mode by factory default - Quad mode is enabled by factory default - Supports mixture of 128KB and 64KB sectors by OTP configuration (this patch supports uniform 128KB only) Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Make CFRx reg fields genericTakahiro Kuwano2023-01-261-4/+4
| | | | | | | | | | | | Cypress defines two flavors of configuration registers, volatile and non volatile, and both use the same bit fields. Rename the bitfields in the configuration registers so that they can be used for both flavors. Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: spi-nor-core: Consider reserved bits in CFR5 registerTakahiro Kuwano2023-01-261-1/+6
| | | | | | | | | | | | | | | CFR5[6] is reserved bit and must be always 1. Set it to comply with flash requirements. While fixing SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN definition, stop using magic numbers and describe the missing bit fields in CFR5 register. This is useful for both readability and future possible addition of Octal STR mode support. Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash") Suggested-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* lib: zstd: update to latest Linux zstd 1.5.2Brandon Maier2023-01-183-972/+2898
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the zstd implementation to match Linux zstd 1.5.2 from commit 2aa14b1ab2. This was motivated by running into decompression corruption issues when trying to uncompress files compressed with newer versions of zstd. zstd users also claim significantly improved decompression times with newer zstd versions which is a side benefit. Original zstd code was copied from Linux commit 2aa14b1ab2 which is a custom-built implementation based on zstd 1.3.1. Linux switched to an implementation that is a copy of the upstream zstd code in Linux commit e0c1b49f5b, this results in a large code diff. However this should make future updates easier along with other benefits[1]. This commit is a straight mirror of the Linux zstd code, except to: - update a few #include that do not translate cleanly - linux/swab.h -> asm/byteorder.h - linux/limits.h -> linux/kernel.h - linux/module.h -> linux/compat.h - remove assert() from debug.h so it doesn't conflict with u-boot's assert() - strip out the compressor code as was done in the previous u-boot zstd - update existing zstd users to the new Linux zstd API - change the #define for MEM_STATIC to use INLINE_KEYWORD for codesize - add a new KConfig option that sets zstd build options to minify code based on zstd's ZSTD_LIB_MINIFY[2]. These changes were tested by booting a zstd 1.5.2 compressed kernel inside a FIT. And the squashfs changes by loading a file from zstd compressed squashfs with sqfsload. buildman was used to compile test other boards and check for binary bloat, as follows: > $ buildman -b zstd2 --boards dh_imx6,m53menlo,mvebu_espressobin-88f3720,sandbox,sandbox64,stm32mp15_dhcom_basic,stm32mp15_dhcor_basic,turris_mox,turris_omnia -sS > Summary of 6 commits for 9 boards (8 threads, 1 job per thread) > 01: Merge branch '2023-01-10-platform-updates' > arm: w+ m53menlo dh_imx6 > 02: lib: zstd: update to latest Linux zstd 1.5.2 > aarch64: (for 2/2 boards) all -3186.0 rodata +920.0 text -4106.0 > arm: (for 5/5 boards) all +1254.4 rodata +940.0 text +314.4 > sandbox: (for 2/2 boards) all -4452.0 data -16.0 rodata +640.0 text -5076.0 [1] https://github.com/torvalds/linux/commit/e0c1b49f5b674cca7b10549c53b3791d0bbc90a8 [2] https://github.com/facebook/zstd/blob/f302ad8811643c428c4e3498e28f53a0578020d3/lib/libzstd.mk#L31 Signed-off-by: Brandon Maier <brandon.maier@collins.com> [trini: Set ret to -EINVAL for the error of "failed to detect compressed" to fix warning, drop ZSTD_SRCSIZEHINT_MAX for non-Linux host tool builds] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'u-boot-nand-20230108' of ↵Tom Rini2023-01-081-79/+0
|\ | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next Pull request for u-boot-nand-20230108 - rawnand: omap_gpmc: driver model support
| * mtd: rawnand: omap_elm: u-boot driver model supportRoger Quadros2023-01-081-79/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
* | Merge tag 'u-boot-at91-2023.04-a' of ↵Tom Rini2023-01-062-0/+231
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-at91 into next First set of u-boot-at91 features for the 2023.04 cycle: This feature set includes the new DM-based NAND flash driver (old non-DM driver is still kept for backwards compatibility), and the move to DM NAND flash driver for sam9x60ek board. Feature set also includes devicetree alignment for sama7g5 with Linux, devicetree alignment on USB with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor configs and tweaks.
| * mfd: syscon: atmel-smc: Add new helpers to ease SMC regs manipulationBalamanikandan Gunasundar2022-12-081-0/+119
| | | | | | | | | | | | | | | | Add helper functions for atmel Static Memory Controller. The functions are required to configure SMC. This file is inherited from the work done by Boris Brezillon for Linux Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
| * mfd: syscon: Add atmel-matrix registers definitionBalamanikandan Gunasundar2022-12-081-0/+112
| | | | | | | | | | | | | | | | This file is copied from Linux. AT91 SoCs have a memory range reserved for internal bus configuration. Expose those registers so that drivers can make use of the matrix syscon declared in at91 DTs. Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
* | mtd: nand: drop EXPORT_SYMBOL_GPL for nanddev_erase()Dario Binacchi2022-12-101-1/+0
|/ | | | | | | | | | | | This function is only used within this module, so it is no longer necessary to use EXPORT_SYMBOL_GPL(). This patch parallels the work done in the following patch: https://lore.kernel.org/linux-mtd/20221018170205.1733958-1-dario.binacchi@amarulasolutions.com Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221108090719.3631621-1-dario.binacchi@amarulasolutions.com
* liteeth: LiteX Ethernet deviceJoel Stanley2022-11-281-0/+84
| | | | | | | | LiteX is a soft system-on-chip that targets FPGAs. LiteETH is a basic network device that is commonly used in LiteX designs. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
* list.h: synchronize hlist_for_each_entry* iterators with linuxRasmus Villemoes2022-11-021-28/+25
| | | | | | | | | | | | | | | | | | | | | | | | | All the way back in 2013, the linux kernel updated the four hlist_for_each_entry* iterators to require one less auxiliary variable: commit b67bfe0d42cac56c512dd5da4b1b347a23f4b70a Author: Sasha Levin <sasha.levin@oracle.com> Date: Wed Feb 27 17:06:00 2013 -0800 hlist: drop the node parameter from iterators Currently, there is only one "user" of any of these, namely in fs/ubifs/super.c, but that actually uses the "new-style" form, and is (obviously, or it wouldn't have built) inside #ifndef __UBOOT__. Before adding actual users of these, import the version as of linux v6.1-rc1, including the hlist_entry_safe() helper used by the new versions. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de> Tested-by: Tim Harvey <tharvey@gateworks.com> # imx8mm-venice-*
* memory: Add TI GPMC driverRoger Quadros2022-10-261-0/+3
| | | | | | | | | | | | | | | The GPMC is a unified memory controller dedicated for interfacing with external memory devices like - Asynchronous SRAM-like memories and ASICs - Asynchronous, synchronous, and page mode burst NOR flash - NAND flash - Pseudo-SRAM devices This driver will take care of setting up the GPMC based on the settings specified in the Device tree and then probe its children. Signed-off-by: Roger Quadros <rogerq@kernel.org>
* mtd: spi-nor-core: Track flash's internal address modeTakahiro Kuwano2022-10-231-0/+5
| | | | | | | | | | | | The nor->addr_width tracks number of address bytes used in read/program/erase ops and eventually set to 4 for >16MB chips, regardless of flash's internal address mode. For Infineon SEMPER flash's, we use Read/Write Any Register commands for configuration and status check. These commands take 3- or 4-byte address depending on flash's internal address mode. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* mtd: Update the function name to 'rfree'Fabio Estevam2022-10-091-1/+1
| | | | | | | | | | | | | Since commit 8d38a8459b0d ("mtd: Rename free() to rfree()") the function has been renamed to rfree(), so update the description inside the mtd_oob_region structure as well. Fixes: 8d38a8459b0d ("mtd: Rename free() to rfree()") Reported-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-11 05:14:50 +0000