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* global: Finish CONFIG -> CFG migrationTom Rini2023-01-201-3/+3
| | | | | | | | | | | | | At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ddr: fsl: Allow to compile it without env supportPali Rohár2022-04-261-0/+4
| | | | | | | | | When env support is disabled then usage of env_get_f() generates linker errors. So do not compile env_get_f() when env support is disabled (for example when disabled only in SPL). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* env: Move env_get_f() to env.hSimon Glass2019-08-111-0/+1
| | | | | | | Move this function over to the new header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers/ddr/fsl: Update fsl_ddr_board_options as weak functionPriyanka Jain2019-02-191-3/+6
| | | | | | | | | | | | fsl_ddr_board_options is generally defined in board board's ddr.c, but some boards like lx2160ardb board does not need this function. Defining fsl_ddr_board_options as weak function to resolve compilation errors for such boards. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [PK: Fix checkpatch warnings] Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
* drivers/ddr/fsl: fix '__hwconfig without a buffer' messagesJeremy Gebben2018-07-261-8/+6
| | | | | | | | | | Pass an empty buffer instead of NULL if the hwconfig environment variable isn't set. Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com> Cc: Stefano Babic <sbabic@denx.de> Cc: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "drivers/ddr/fsl: Dual-license DDR driver"Tom Rini2018-02-141-1/+1
| | | | | | | Upon further review, not all code authors are in favour of this change. This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4. Signed-off-by: Tom Rini <trini@konsulko.com>
* drivers/ddr/fsl: Dual-license DDR driverYork Sun2018-02-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | To make this driver easier to be reused, dual-license DDR driver. Signed-off-by: York Sun <york.sun@nxp.com> CC: Simon Glass <sjg@chromium.org> CC: Tom Rini <trini@konsulko.com> CC: Heinrich Schuchardt <xypron.glpk@gmx.de> CC: Thomas Schaefer <thomas.schaefer@kontron.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Robert P. J. Day <rpjday@crashcourse.ca> CC: Alexander Merkle <alexander.merkle@lauterbach.com> CC: Joakim Tjernlund <joakim.tjernlund@transmode.se> CC: Curt Brune <curt@cumulusnetworks.com> CC: Valentin Longchamp <valentin.longchamp@keymile.com> CC: Wolfgang Denk <wd@denx.de> CC: Anatolij Gustschin <agust@denx.de> CC: Ira W. Snyder <iws@ovro.caltech.edu> CC: Marek Vasut <marek.vasut@gmail.com> CC: Kyle Moffett <Kyle.D.Moffett@boeing.com> CC: Sebastien Carlier <sebastien.carlier@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Peter Tyser <ptyser@xes-inc.com> CC: Paul Gortmaker <paul.gortmaker@windriver.com> CC: Peter Tyser <ptyser@xes-inc.com> CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* drivers/ddr/fsl: Add calculation of register control wordsYork Sun2018-01-301-0/+4
| | | | | | | | DDR4 RDIMM has some information in SPD to be used to calculate the control words for register chip. The rest can be found from JEDEC spec DDR4RCD02. Signed-off-by: York Sun <york.sun@nxp.com>
* drivers/ddr/fsl: Add 3DS RDIMM supportYork Sun2018-01-301-1/+4
| | | | | | | On top of RDIMM support, add new register calculation to support 3DS RDIMMs. Only symmetrical 3DS is supported at this time. Signed-off-by: York Sun <york.sun@nxp.com>
* env: Rename getenv/_f() to env_get()Simon Glass2017-08-161-3/+3
| | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* common: arm: freescale: layerscape: Move header files out of common.hSimon Glass2017-06-051-1/+2
| | | | | | | We should not have an arch-specific header file in common.h. Adjust the board files a little so it is not needed, and drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: freescale: Move arch-specific declarationsSimon Glass2017-06-051-0/+3
| | | | | | | | | The declarations should not be in common.h. Move them to the arch-specific headers. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Fixup thinko defined(FSL_LSCH3) -> defined(CONFIG_FSL_LSCH3)] Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-04-181-36/+36
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| * drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer2017-04-171-36/+36
| | | | | | | | | | | | | | | | | | | | | | | | Depending on DDR configuration, gcc-6.x will show up unused-const- variable messages. Use __maybe_unused specifier for all dynamic_odt variable definitions to remove these warnings. Memory footprint will not increase as gcc will optimize out unused constants. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de2017-04-181-1/+1
|/ | | | | | | | | | | | | (pdimm[0].data_width >= 32) || (pdimm[0].data_width <= 40) is always true. We should use && here. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun2017-01-041-15/+15
| | | | | | | | These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* drivers/ddr/fsl: Disabling data init if ECC is not enabledYork Sun2016-06-031-1/+2
| | | | | | If ECC is not enabled, data init can be disabled to speed up booting. Signed-off-by: York Sun <york.sun@nxp.com>
* driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu2016-03-211-2/+13
| | | | | | | | | | Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* driver/ddr/fsl: Update DDR4 RTT valuesYork Sun2015-12-131-2/+235
| | | | | | | DDR4 has different RTT value and code according to JEDEC spec. Update the macros and options . Signed-off-by: York Sun <yorksun@freescale.com>
* drivers/ddr/fsl: Adjust bstopre valueYork Sun2015-08-031-4/+6
| | | | | | | | | By default the bstopre value has been set to 0x100, used to be 1/4 value of refint. Modern DDR has increased the refresh time. Adjust to 1/4 of refresh interval dynamically. Individual board can still override this value in board ddr file, or to use auto-precharge. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr/fsl: Fix driver to support empty first slotYork Sun2015-04-231-1/+6
| | | | | | | | CS0 was not allowed to be empty by u-boot driver in the past to simplify the driver. This may be inconvenient for some debugging. This patch lifts the restrictions. Controller interleaving still requires CS0 populated. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr/fsl: Add support for multiple DDR clocksYork Sun2015-02-241-3/+3
| | | | | | | | | Controller number is passed for function calls to support individual DDR clock, depending on SoC implementation. It is backward compatible with exising platforms. Multiple clocks have been verifyed on LS2085A emulator. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr/fsl: Fix tXP and tCKEYork Sun2014-09-251-4/+0
| | | | | | | | The driver was written using old DDR3 spec which only covers low speeds. The value would be suboptimal for higher speeds. Fix both timing according to latest DDR3 spec, remove tCKE as an config option. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr: Restruct driver to allow standalone memory spaceYork Sun2014-09-251-10/+13
| | | | | | | | | | U-boot has been initializing DDR for the main memory. The presumption is the memory stays as a big continuous block, either linear or interleaved. This change is to support putting some DDR controllers to separated space without counting into main memory. The standalone memory controller could use different number of DIMM slots. Signed-off-by: York Sun <yorksun@freescale.com>
* drivers/ddr: Fix possible out of bounds errorYork Sun2014-04-221-54/+54
| | | | | | | | | This is a theoretical possible out of bounds error in DDR driver. Adding check before using array index. Also change some runtime conditions to pre-compiling conditions. Signed-off-by: York Sun <yorksun@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun2014-04-221-15/+19
| | | | | | | Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ddr: Add 256 byte interleaving supportYork Sun2014-02-211-2/+15
| | | | | | | Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory. Signed-off-by: York Sun <yorksun@freescale.com>
* Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-251-0/+1147
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
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