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Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/stm32_qspi.c46
-rw-r--r--drivers/spi/stm32_spi.c31
2 files changed, 42 insertions, 35 deletions
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 440085720a..75e5e840ed 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -7,6 +7,8 @@
* STM32 QSPI driver
*/
+#define LOG_CATEGORY UCLASS_SPI
+
#include <common.h>
#include <clk.h>
#include <dm.h>
@@ -136,7 +138,7 @@ static int _stm32_qspi_wait_for_not_busy(struct stm32_qspi_priv *priv)
!(sr & STM32_QSPI_SR_BUSY),
STM32_BUSY_TIMEOUT_US);
if (ret)
- pr_err("busy timeout (stat:%#x)\n", sr);
+ log_err("busy timeout (stat:%#x)\n", sr);
return ret;
}
@@ -154,9 +156,9 @@ static int _stm32_qspi_wait_cmd(struct stm32_qspi_priv *priv,
sr & STM32_QSPI_SR_TCF,
STM32_QSPI_CMD_TIMEOUT_US);
if (ret) {
- pr_err("cmd timeout (stat:%#x)\n", sr);
+ log_err("cmd timeout (stat:%#x)\n", sr);
} else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
- pr_err("transfer error (stat:%#x)\n", sr);
+ log_err("transfer error (stat:%#x)\n", sr);
ret = -EIO;
}
@@ -198,7 +200,7 @@ static int _stm32_qspi_poll(struct stm32_qspi_priv *priv,
sr & STM32_QSPI_SR_FTF,
STM32_QSPI_FIFO_TIMEOUT_US);
if (ret) {
- pr_err("fifo timeout (len:%d stat:%#x)\n", len, sr);
+ log_err("fifo timeout (len:%d stat:%#x)\n", len, sr);
return ret;
}
@@ -246,10 +248,10 @@ static int stm32_qspi_exec_op(struct spi_slave *slave,
u8 mode = STM32_QSPI_CCR_IND_WRITE;
int timeout, ret;
- debug("%s: cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n",
- __func__, op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
- op->dummy.buswidth, op->data.buswidth,
- op->addr.val, op->data.nbytes);
+ dev_dbg(slave->dev, "cmd:%#x mode:%d.%d.%d.%d addr:%#llx len:%#x\n",
+ op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
+ op->dummy.buswidth, op->data.buswidth,
+ op->addr.val, op->data.nbytes);
ret = _stm32_qspi_wait_for_not_busy(priv);
if (ret)
@@ -320,7 +322,7 @@ abort:
writel(STM32_QSPI_FCR_CTCF, &priv->regs->fcr);
if (ret || timeout)
- pr_err("%s ret:%d abort timeout:%d\n", __func__, ret, timeout);
+ dev_err(slave->dev, "ret:%d abort timeout:%d\n", ret, timeout);
return ret;
}
@@ -353,8 +355,8 @@ static int stm32_qspi_probe(struct udevice *bus)
if (priv->mm_size > STM32_QSPI_MAX_MMAP_SZ)
return -EINVAL;
- debug("%s: regs=<0x%p> mapped=<0x%p> mapped_size=<0x%lx>\n",
- __func__, priv->regs, priv->mm_base, priv->mm_size);
+ dev_dbg(bus, "regs=<0x%p> mapped=<0x%p> mapped_size=<0x%lx>\n",
+ priv->regs, priv->mm_base, priv->mm_size);
ret = clk_get_by_index(bus, 0, &clk);
if (ret < 0)
@@ -475,8 +477,8 @@ static int stm32_qspi_set_speed(struct udevice *bus, uint speed)
STM32_QSPI_DCR_CSHT_MASK << STM32_QSPI_DCR_CSHT_SHIFT,
csht << STM32_QSPI_DCR_CSHT_SHIFT);
- debug("%s: regs=%p, speed=%d\n", __func__, priv->regs,
- (qspi_clk / (prescaler + 1)));
+ dev_dbg(bus, "regs=%p, speed=%d\n", priv->regs,
+ (qspi_clk / (prescaler + 1)));
return 0;
}
@@ -485,6 +487,7 @@ static int stm32_qspi_set_mode(struct udevice *bus, uint mode)
{
struct stm32_qspi_priv *priv = dev_get_priv(bus);
int ret;
+ const char *str_rx, *str_tx;
ret = _stm32_qspi_wait_for_not_busy(priv);
if (ret)
@@ -500,21 +503,22 @@ static int stm32_qspi_set_mode(struct udevice *bus, uint mode)
if (mode & SPI_CS_HIGH)
return -ENODEV;
- debug("%s: regs=%p, mode=%d rx: ", __func__, priv->regs, mode);
-
if (mode & SPI_RX_QUAD)
- debug("quad, tx: ");
+ str_rx = "quad";
else if (mode & SPI_RX_DUAL)
- debug("dual, tx: ");
+ str_rx = "dual";
else
- debug("single, tx: ");
+ str_rx = "single";
if (mode & SPI_TX_QUAD)
- debug("quad\n");
+ str_tx = "quad";
else if (mode & SPI_TX_DUAL)
- debug("dual\n");
+ str_tx = "dual";
else
- debug("single\n");
+ str_tx = "single";
+
+ dev_dbg(bus, "regs=%p, mode=%d rx: %s, tx: %s\n",
+ priv->regs, mode, str_rx, str_tx);
return 0;
}
diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
index 720103d517..bd8514033d 100644
--- a/drivers/spi/stm32_spi.c
+++ b/drivers/spi/stm32_spi.c
@@ -4,6 +4,9 @@
*
* Driver for STMicroelectronics Serial peripheral interface (SPI)
*/
+
+#define LOG_CATEGORY UCLASS_SPI
+
#include <common.h>
#include <clk.h>
#include <dm.h>
@@ -138,7 +141,7 @@ static void stm32_spi_write_txfifo(struct stm32_spi_priv *priv)
}
}
- debug("%s: %d bytes left\n", __func__, priv->tx_len);
+ log_debug("%d bytes left\n", priv->tx_len);
}
static void stm32_spi_read_rxfifo(struct stm32_spi_priv *priv)
@@ -176,12 +179,12 @@ static void stm32_spi_read_rxfifo(struct stm32_spi_priv *priv)
rxplvl = (sr & SPI_SR_RXPLVL) >> SPI_SR_RXPLVL_SHIFT;
}
- debug("%s: %d bytes left\n", __func__, priv->rx_len);
+ log_debug("%d bytes left\n", priv->rx_len);
}
static int stm32_spi_enable(struct stm32_spi_priv *priv)
{
- debug("%s\n", __func__);
+ log_debug("\n");
/* Enable the SPI hardware */
setbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
@@ -191,7 +194,7 @@ static int stm32_spi_enable(struct stm32_spi_priv *priv)
static int stm32_spi_disable(struct stm32_spi_priv *priv)
{
- debug("%s\n", __func__);
+ log_debug("\n");
/* Disable the SPI hardware */
clrbits_le32(priv->base + STM32_SPI_CR1, SPI_CR1_SPE);
@@ -204,7 +207,7 @@ static int stm32_spi_claim_bus(struct udevice *slave)
struct udevice *bus = dev_get_parent(slave);
struct stm32_spi_priv *priv = dev_get_priv(bus);
- debug("%s\n", __func__);
+ dev_dbg(slave, "\n");
/* Enable the SPI hardware */
return stm32_spi_enable(priv);
@@ -215,7 +218,7 @@ static int stm32_spi_release_bus(struct udevice *slave)
struct udevice *bus = dev_get_parent(slave);
struct stm32_spi_priv *priv = dev_get_priv(bus);
- debug("%s\n", __func__);
+ dev_dbg(slave, "\n");
/* Disable the SPI hardware */
return stm32_spi_disable(priv);
@@ -227,7 +230,7 @@ static void stm32_spi_stopxfer(struct udevice *dev)
u32 cr1, sr;
int ret;
- debug("%s\n", __func__);
+ dev_dbg(dev, "\n");
cr1 = readl(priv->base + STM32_SPI_CR1);
@@ -255,7 +258,7 @@ static int stm32_spi_set_cs(struct udevice *dev, unsigned int cs, bool enable)
{
struct stm32_spi_priv *priv = dev_get_priv(dev);
- debug("%s: cs=%d enable=%d\n", __func__, cs, enable);
+ dev_dbg(dev, "cs=%d enable=%d\n", cs, enable);
if (cs >= MAX_CS_COUNT)
return -ENODEV;
@@ -274,7 +277,7 @@ static int stm32_spi_set_mode(struct udevice *bus, uint mode)
struct stm32_spi_priv *priv = dev_get_priv(bus);
u32 cfg2_clrb = 0, cfg2_setb = 0;
- debug("%s: mode=%d\n", __func__, mode);
+ dev_dbg(bus, "mode=%d\n", mode);
if (mode & SPI_CPOL)
cfg2_setb |= SPI_CFG2_CPOL;
@@ -330,7 +333,7 @@ static int stm32_spi_set_speed(struct udevice *bus, uint hz)
u32 mbrdiv;
long div;
- debug("%s: hz=%d\n", __func__, hz);
+ dev_dbg(bus, "hz=%d\n", hz);
if (priv->cur_hz == hz)
return 0;
@@ -404,8 +407,8 @@ static int stm32_spi_xfer(struct udevice *slave, unsigned int bitlen,
stm32_spi_enable(priv);
}
- debug("%s: priv->tx_len=%d priv->rx_len=%d\n", __func__,
- priv->tx_len, priv->rx_len);
+ dev_dbg(bus, "priv->tx_len=%d priv->rx_len=%d\n",
+ priv->tx_len, priv->rx_len);
slave_plat = dev_get_parent_plat(slave);
if (flags & SPI_XFER_BEGIN)
@@ -477,7 +480,7 @@ static int stm32_spi_get_fifo_size(struct udevice *dev)
stm32_spi_disable(priv);
- debug("%s %d x 8-bit fifo size\n", __func__, count);
+ dev_dbg(dev, "%d x 8-bit fifo size\n", count);
return count;
}
@@ -522,7 +525,7 @@ static int stm32_spi_probe(struct udevice *dev)
ret = gpio_request_list_by_name(dev, "cs-gpios", priv->cs_gpios,
ARRAY_SIZE(priv->cs_gpios), 0);
if (ret < 0) {
- pr_err("Can't get %s cs gpios: %d", dev->name, ret);
+ dev_err(dev, "Can't get cs gpios: %d", ret);
goto reset_err;
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-01 12:14:02 +0000