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path: root/drivers/ddr/fsl
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Diffstat (limited to 'drivers/ddr/fsl')
-rw-r--r--drivers/ddr/fsl/fsl_ddr_gen4.c28
-rw-r--r--drivers/ddr/fsl/main.c1
-rw-r--r--drivers/ddr/fsl/util.c40
3 files changed, 55 insertions, 14 deletions
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 49e4688351..1de7b72b4c 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -107,14 +107,14 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
goto step2;
#ifdef CONFIG_SYS_FSL_ERRATUM_A008336
-#ifdef CONFIG_LS2085A
+#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
/* A008336 only applies to general DDR controllers */
if ((ctrl_num == 0) || (ctrl_num == 1))
#endif
ddr_out32(eddrtqcr1, 0x63b30002);
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A008514
-#ifdef CONFIG_LS2085A
+#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A)
/* A008514 only applies to DP-DDR controler */
if (ctrl_num == 2)
#endif
@@ -423,16 +423,16 @@ step2:
if (getenv_f("ddr_bist", buffer, CONFIG_SYS_CBSIZE) >= 0) {
puts("Running BIST test. This will take a while...");
cs0_config = ddr_in32(&ddr->cs0_config);
+ cs0_bnds = ddr_in32(&ddr->cs0_bnds);
+ cs1_bnds = ddr_in32(&ddr->cs1_bnds);
+ cs2_bnds = ddr_in32(&ddr->cs2_bnds);
+ cs3_bnds = ddr_in32(&ddr->cs3_bnds);
if (cs0_config & CTLR_INTLV_MASK) {
- cs0_bnds = ddr_in32(&cs0_bnds);
- cs1_bnds = ddr_in32(&cs1_bnds);
- cs2_bnds = ddr_in32(&cs2_bnds);
- cs3_bnds = ddr_in32(&cs3_bnds);
/* set bnds to non-interleaving */
- ddr_out32(&cs0_bnds, (cs0_bnds & 0xfffefffe) >> 1);
- ddr_out32(&cs1_bnds, (cs1_bnds & 0xfffefffe) >> 1);
- ddr_out32(&cs2_bnds, (cs2_bnds & 0xfffefffe) >> 1);
- ddr_out32(&cs3_bnds, (cs3_bnds & 0xfffefffe) >> 1);
+ ddr_out32(&ddr->cs0_bnds, (cs0_bnds & 0xfffefffe) >> 1);
+ ddr_out32(&ddr->cs1_bnds, (cs1_bnds & 0xfffefffe) >> 1);
+ ddr_out32(&ddr->cs2_bnds, (cs2_bnds & 0xfffefffe) >> 1);
+ ddr_out32(&ddr->cs3_bnds, (cs3_bnds & 0xfffefffe) >> 1);
}
ddr_out32(&ddr->mtp1, BIST_PATTERN1);
ddr_out32(&ddr->mtp2, BIST_PATTERN1);
@@ -469,10 +469,10 @@ step2:
if (cs0_config & CTLR_INTLV_MASK) {
/* restore bnds registers */
- ddr_out32(&cs0_bnds, cs0_bnds);
- ddr_out32(&cs1_bnds, cs1_bnds);
- ddr_out32(&cs2_bnds, cs2_bnds);
- ddr_out32(&cs3_bnds, cs3_bnds);
+ ddr_out32(&ddr->cs0_bnds, cs0_bnds);
+ ddr_out32(&ddr->cs1_bnds, cs1_bnds);
+ ddr_out32(&ddr->cs2_bnds, cs2_bnds);
+ ddr_out32(&ddr->cs3_bnds, cs3_bnds);
}
}
#endif
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index 72ec1be65d..c68663220d 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -813,6 +813,7 @@ phys_size_t fsl_ddr_sdram(void)
info.board_need_mem_reset = board_need_mem_reset;
info.board_mem_reset = board_assert_mem_reset;
info.board_mem_de_reset = board_deassert_mem_reset;
+ remove_unused_controllers(&info);
return __fsl_ddr_sdram(&info);
}
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index ce55aea1b4..1a49b28f33 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -385,3 +385,43 @@ void fsl_ddr_sync_memctl_refresh(unsigned int first_ctrl,
ddr_out32(ddrc_debug2_p[i], ddrc_debug2[i]);
}
#endif /* CONFIG_FSL_DDR_SYNC_REFRESH */
+
+void remove_unused_controllers(fsl_ddr_info_t *info)
+{
+#ifdef CONFIG_FSL_LSCH3
+ int i;
+ u64 nodeid;
+ void *hnf_sam_ctrl = (void *)(CCI_HN_F_0_BASE + CCN_HN_F_SAM_CTL);
+ bool ddr0_used = false;
+ bool ddr1_used = false;
+
+ for (i = 0; i < 8; i++) {
+ nodeid = in_le64(hnf_sam_ctrl) & CCN_HN_F_SAM_NODEID_MASK;
+ if (nodeid == CCN_HN_F_SAM_NODEID_DDR0) {
+ ddr0_used = true;
+ } else if (nodeid == CCN_HN_F_SAM_NODEID_DDR1) {
+ ddr1_used = true;
+ } else {
+ printf("Unknown nodeid in HN-F SAM control: 0x%llx\n",
+ nodeid);
+ }
+ hnf_sam_ctrl += (CCI_HN_F_1_BASE - CCI_HN_F_0_BASE);
+ }
+ if (!ddr0_used && !ddr1_used) {
+ printf("Invalid configuration in HN-F SAM control\n");
+ return;
+ }
+
+ if (!ddr0_used && info->first_ctrl == 0) {
+ info->first_ctrl = 1;
+ info->num_ctrls = 1;
+ debug("First DDR controller disabled\n");
+ return;
+ }
+
+ if (!ddr1_used && info->first_ctrl + info->num_ctrls > 1) {
+ info->num_ctrls = 1;
+ debug("Second DDR controller disabled\n");
+ }
+#endif
+}