diff options
Diffstat (limited to 'board/gdsys/a38x/controlcenterdc.c')
| -rw-r--r-- | board/gdsys/a38x/controlcenterdc.c | 31 |
1 files changed, 14 insertions, 17 deletions
diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c index ccebba7272..0f620c2d91 100644 --- a/board/gdsys/a38x/controlcenterdc.c +++ b/board/gdsys/a38x/controlcenterdc.c @@ -7,6 +7,7 @@ #include <common.h> #include <command.h> #include <dm.h> +#include <event.h> #include <init.h> #include <miiphy.h> #include <net.h> @@ -35,19 +36,6 @@ DECLARE_GLOBAL_DATA_PTR; #define DB_GP_88F68XX_GPP_POL_LOW 0x0 #define DB_GP_88F68XX_GPP_POL_MID 0x0 -static int get_tpm(struct udevice **devp) -{ - int rc; - - rc = uclass_first_device_err(UCLASS_TPM, devp); - if (rc) { - printf("Could not find TPM (ret=%d)\n", rc); - return CMD_RET_FAILURE; - } - - return 0; -} - /* * Define the DDR layout / topology here in the board file. This will * be used by the DDR3 init code in the SPL U-Boot version to configure @@ -284,15 +272,22 @@ int board_fix_fdt(void *rw_fdt_blob) return 0; } -int last_stage_init(void) +#ifndef CONFIG_SPL_BUILD +static int last_stage_init(void) { struct udevice *tpm; int ret; -#ifndef CONFIG_SPL_BUILD + if (IS_ENABLED(CONFIG_SPL_BUILD)) + return 0; ccdc_eth_init(); -#endif - ret = get_tpm(&tpm); + + ret = uclass_first_device_err(UCLASS_TPM, &tpm); + if (ret) { + printf("Could not find TPM (ret=%d)\n", ret); + return ret; + } + if (ret || tpm_init(tpm) || tpm1_startup(tpm, TPM_ST_CLEAR) || tpm1_continue_self_test(tpm)) { return 1; @@ -305,3 +300,5 @@ int last_stage_init(void) return 0; } +EVENT_SPY_SIMPLE(EVT_LAST_STAGE_INIT, last_stage_init); +#endif |