1 files changed, 30 insertions, 20 deletions

diff --git a/board/gateworks/venice/venice.c b/board/gateworks/venice/venice.c
index 425c69056d..4290a69807 100644
--- a/board/gateworks/venice/venice.c
+++ b/board/gateworks/venice/venice.c
@@ -3,21 +3,13 @@
  * Copyright 2021 Gateworks Corporation
  */
 
-#include <common.h>
 #include <init.h>
 #include <led.h>
-#include <linux/delay.h>
 #include <miiphy.h>
-#include <netdev.h>
-
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <asm/unaligned.h>
-
-#include "gsc.h"
 
-DECLARE_GLOBAL_DATA_PTR;
+#include "eeprom.h"
 
 int board_phys_sdram_size(phys_size_t *size)
 {
@@ -37,7 +29,7 @@ int board_fit_config_name_match(const char *name)
 	char buf[32];
 
 	do {
-		dtb = gsc_get_dtb_name(i++, buf, sizeof(buf));
+		dtb = eeprom_get_dtb_name(i++, buf, sizeof(buf));
 		if (!strcmp(dtb, name)) {
 			if (!init++)
 				printf("DTB     : %s\n", name);
@@ -48,18 +40,36 @@ int board_fit_config_name_match(const char *name)
 	return -1;
 }
 
-#if (IS_ENABLED(CONFIG_FEC_MXC))
+#if (IS_ENABLED(CONFIG_NET))
 static int setup_fec(void)
 {
 	struct iomuxc_gpr_base_regs *gpr =
 		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
 
+#ifndef CONFIG_IMX8MP
 	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
 	clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
+#else
+	/* Enable RGMII TX clk output */
+	setbits_le32(&gpr->gpr[1], BIT(22));
+#endif
 
 	return 0;
 }
 
+static int setup_eqos(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* set INTF as RGMII, enable RGMII TXC clock */
+	clrsetbits_le32(&gpr->gpr[1],
+			IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK, BIT(16));
+	setbits_le32(&gpr->gpr[1], BIT(19) | BIT(21));
+
+	return set_clk_eqos(ENET_125MHZ);
+}
+
 int board_phy_config(struct phy_device *phydev)
 {
 	unsigned short val;
@@ -96,16 +106,16 @@ int board_phy_config(struct phy_device *phydev)
 
 	return 0;
 }
-#endif // IS_ENABLED(CONFIG_FEC_MXC)
+#endif // IS_ENABLED(CONFIG_NET)
 
 int board_init(void)
 {
-	gsc_init(1);
+	eeprom_init(1);
 
 	if (IS_ENABLED(CONFIG_FEC_MXC))
 		setup_fec();
-
-	gsc_hwmon();
+	if (IS_ENABLED(CONFIG_DWC_ETH_QOS))
+		setup_eqos();
 
 	return 0;
 }
@@ -122,13 +132,13 @@ int board_late_init(void)
 
 	/* Set board serial/model */
 	if (!env_get("serial#"))
-		env_set_ulong("serial#", gsc_get_serial());
-	env_set("model", gsc_get_model());
+		env_set_ulong("serial#", eeprom_get_serial());
+	env_set("model", eeprom_get_model());
 
 	/* Set fdt_file vars */
 	i = 0;
 	do {
-		str = gsc_get_dtb_name(i, fdt, sizeof(fdt));
+		str = eeprom_get_dtb_name(i, fdt, sizeof(fdt));
 		if (str) {
 			sprintf(env, "fdt_file%d", i + 1);
 			strcat(fdt, ".dtb");
@@ -146,7 +156,7 @@ int board_late_init(void)
 			sprintf(env, "ethaddr");
 		str = env_get(env);
 		if (!str) {
-			ret = gsc_getmac(i, enetaddr);
+			ret = eeprom_getmac(i, enetaddr);
 			if (!ret)
 				eth_env_set_enetaddr(env, enetaddr);
 		}
@@ -166,7 +176,7 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 	int off;
 
 	/* set board model dt prop */
-	fdt_setprop_string(blob, 0, "board", gsc_get_model());
+	fdt_setprop_string(blob, 0, "board", eeprom_get_model());
 
 	/* update temp thresholds */
 	off = fdt_path_offset(blob, "/thermal-zones/cpu-thermal/trips");