diff options
Diffstat (limited to 'arch/powerpc/cpu/mpc83xx')
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/bats/bats.h | 128 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/cpu_init.c | 26 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/hid/hid.h | 12 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h | 4 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h | 32 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/spd_sdram.c | 6 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/spl_minimal.c | 10 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/start.S | 154 |
8 files changed, 186 insertions, 186 deletions
diff --git a/arch/powerpc/cpu/mpc83xx/bats/bats.h b/arch/powerpc/cpu/mpc83xx/bats/bats.h index f0754c2351..2629cd5eab 100644 --- a/arch/powerpc/cpu/mpc83xx/bats/bats.h +++ b/arch/powerpc/cpu/mpc83xx/bats/bats.h @@ -1,223 +1,223 @@ #ifdef CONFIG_BAT0 -#define CONFIG_SYS_IBAT0L (\ +#define CFG_SYS_IBAT0L (\ (CONFIG_BAT0_BASE) |\ (CONFIG_BAT0_PAGE_PROTECTION) |\ (CONFIG_BAT0_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT0U (\ +#define CFG_SYS_IBAT0U (\ (CONFIG_BAT0_BASE) |\ (CONFIG_BAT0_LENGTH) |\ (CONFIG_BAT0_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT0L (\ +#define CFG_SYS_DBAT0L (\ (CONFIG_BAT0_BASE) |\ (CONFIG_BAT0_PAGE_PROTECTION) |\ (CONFIG_BAT0_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT0U (\ +#define CFG_SYS_DBAT0U (\ (CONFIG_BAT0_BASE) |\ (CONFIG_BAT0_LENGTH) |\ (CONFIG_BAT0_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT0L (0) -#define CONFIG_SYS_IBAT0U (0) -#define CONFIG_SYS_DBAT0L (0) -#define CONFIG_SYS_DBAT0U (0) +#define CFG_SYS_IBAT0L (0) +#define CFG_SYS_IBAT0U (0) +#define CFG_SYS_DBAT0L (0) +#define CFG_SYS_DBAT0U (0) #endif /* CONFIG_BAT0 */ #ifdef CONFIG_BAT1 -#define CONFIG_SYS_IBAT1L (\ +#define CFG_SYS_IBAT1L (\ (CONFIG_BAT1_BASE) |\ (CONFIG_BAT1_PAGE_PROTECTION) |\ (CONFIG_BAT1_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT1U (\ +#define CFG_SYS_IBAT1U (\ (CONFIG_BAT1_BASE) |\ (CONFIG_BAT1_LENGTH) |\ (CONFIG_BAT1_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT1L (\ +#define CFG_SYS_DBAT1L (\ (CONFIG_BAT1_BASE) |\ (CONFIG_BAT1_PAGE_PROTECTION) |\ (CONFIG_BAT1_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT1U (\ +#define CFG_SYS_DBAT1U (\ (CONFIG_BAT1_BASE) |\ (CONFIG_BAT1_LENGTH) |\ (CONFIG_BAT1_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT1L (0) -#define CONFIG_SYS_IBAT1U (0) -#define CONFIG_SYS_DBAT1L (0) -#define CONFIG_SYS_DBAT1U (0) +#define CFG_SYS_IBAT1L (0) +#define CFG_SYS_IBAT1U (0) +#define CFG_SYS_DBAT1L (0) +#define CFG_SYS_DBAT1U (0) #endif /* CONFIG_BAT1 */ #ifdef CONFIG_BAT2 -#define CONFIG_SYS_IBAT2L (\ +#define CFG_SYS_IBAT2L (\ (CONFIG_BAT2_BASE) |\ (CONFIG_BAT2_PAGE_PROTECTION) |\ (CONFIG_BAT2_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT2U (\ +#define CFG_SYS_IBAT2U (\ (CONFIG_BAT2_BASE) |\ (CONFIG_BAT2_LENGTH) |\ (CONFIG_BAT2_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT2L (\ +#define CFG_SYS_DBAT2L (\ (CONFIG_BAT2_BASE) |\ (CONFIG_BAT2_PAGE_PROTECTION) |\ (CONFIG_BAT2_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT2U (\ +#define CFG_SYS_DBAT2U (\ (CONFIG_BAT2_BASE) |\ (CONFIG_BAT2_LENGTH) |\ (CONFIG_BAT2_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT2L (0) -#define CONFIG_SYS_IBAT2U (0) -#define CONFIG_SYS_DBAT2L (0) -#define CONFIG_SYS_DBAT2U (0) +#define CFG_SYS_IBAT2L (0) +#define CFG_SYS_IBAT2U (0) +#define CFG_SYS_DBAT2L (0) +#define CFG_SYS_DBAT2U (0) #endif /* CONFIG_BAT2 */ #ifdef CONFIG_BAT3 -#define CONFIG_SYS_IBAT3L (\ +#define CFG_SYS_IBAT3L (\ (CONFIG_BAT3_BASE) |\ (CONFIG_BAT3_PAGE_PROTECTION) |\ (CONFIG_BAT3_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT3U (\ +#define CFG_SYS_IBAT3U (\ (CONFIG_BAT3_BASE) |\ (CONFIG_BAT3_LENGTH) |\ (CONFIG_BAT3_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT3L (\ +#define CFG_SYS_DBAT3L (\ (CONFIG_BAT3_BASE) |\ (CONFIG_BAT3_PAGE_PROTECTION) |\ (CONFIG_BAT3_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT3U (\ +#define CFG_SYS_DBAT3U (\ (CONFIG_BAT3_BASE) |\ (CONFIG_BAT3_LENGTH) |\ (CONFIG_BAT3_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT3L (0) -#define CONFIG_SYS_IBAT3U (0) -#define CONFIG_SYS_DBAT3L (0) -#define CONFIG_SYS_DBAT3U (0) +#define CFG_SYS_IBAT3L (0) +#define CFG_SYS_IBAT3U (0) +#define CFG_SYS_DBAT3L (0) +#define CFG_SYS_DBAT3U (0) #endif /* CONFIG_BAT3 */ #ifdef CONFIG_BAT4 -#define CONFIG_SYS_IBAT4L (\ +#define CFG_SYS_IBAT4L (\ (CONFIG_BAT4_BASE) |\ (CONFIG_BAT4_PAGE_PROTECTION) |\ (CONFIG_BAT4_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT4U (\ +#define CFG_SYS_IBAT4U (\ (CONFIG_BAT4_BASE) |\ (CONFIG_BAT4_LENGTH) |\ (CONFIG_BAT4_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT4L (\ +#define CFG_SYS_DBAT4L (\ (CONFIG_BAT4_BASE) |\ (CONFIG_BAT4_PAGE_PROTECTION) |\ (CONFIG_BAT4_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT4U (\ +#define CFG_SYS_DBAT4U (\ (CONFIG_BAT4_BASE) |\ (CONFIG_BAT4_LENGTH) |\ (CONFIG_BAT4_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT4L (0) -#define CONFIG_SYS_IBAT4U (0) -#define CONFIG_SYS_DBAT4L (0) -#define CONFIG_SYS_DBAT4U (0) +#define CFG_SYS_IBAT4L (0) +#define CFG_SYS_IBAT4U (0) +#define CFG_SYS_DBAT4L (0) +#define CFG_SYS_DBAT4U (0) #endif /* CONFIG_BAT4 */ #ifdef CONFIG_BAT5 -#define CONFIG_SYS_IBAT5L (\ +#define CFG_SYS_IBAT5L (\ (CONFIG_BAT5_BASE) |\ (CONFIG_BAT5_PAGE_PROTECTION) |\ (CONFIG_BAT5_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT5U (\ +#define CFG_SYS_IBAT5U (\ (CONFIG_BAT5_BASE) |\ (CONFIG_BAT5_LENGTH) |\ (CONFIG_BAT5_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT5L (\ +#define CFG_SYS_DBAT5L (\ (CONFIG_BAT5_BASE) |\ (CONFIG_BAT5_PAGE_PROTECTION) |\ (CONFIG_BAT5_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT5U (\ +#define CFG_SYS_DBAT5U (\ (CONFIG_BAT5_BASE) |\ (CONFIG_BAT5_LENGTH) |\ (CONFIG_BAT5_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT5L (0) -#define CONFIG_SYS_IBAT5U (0) -#define CONFIG_SYS_DBAT5L (0) -#define CONFIG_SYS_DBAT5U (0) +#define CFG_SYS_IBAT5L (0) +#define CFG_SYS_IBAT5U (0) +#define CFG_SYS_DBAT5L (0) +#define CFG_SYS_DBAT5U (0) #endif /* CONFIG_BAT5 */ #ifdef CONFIG_BAT6 -#define CONFIG_SYS_IBAT6L (\ +#define CFG_SYS_IBAT6L (\ (CONFIG_BAT6_BASE) |\ (CONFIG_BAT6_PAGE_PROTECTION) |\ (CONFIG_BAT6_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT6U (\ +#define CFG_SYS_IBAT6U (\ (CONFIG_BAT6_BASE) |\ (CONFIG_BAT6_LENGTH) |\ (CONFIG_BAT6_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT6L (\ +#define CFG_SYS_DBAT6L (\ (CONFIG_BAT6_BASE) |\ (CONFIG_BAT6_PAGE_PROTECTION) |\ (CONFIG_BAT6_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT6U (\ +#define CFG_SYS_DBAT6U (\ (CONFIG_BAT6_BASE) |\ (CONFIG_BAT6_LENGTH) |\ (CONFIG_BAT6_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT6L (0) -#define CONFIG_SYS_IBAT6U (0) -#define CONFIG_SYS_DBAT6L (0) -#define CONFIG_SYS_DBAT6U (0) +#define CFG_SYS_IBAT6L (0) +#define CFG_SYS_IBAT6U (0) +#define CFG_SYS_DBAT6L (0) +#define CFG_SYS_DBAT6U (0) #endif /* CONFIG_BAT6 */ #ifdef CONFIG_BAT7 -#define CONFIG_SYS_IBAT7L (\ +#define CFG_SYS_IBAT7L (\ (CONFIG_BAT7_BASE) |\ (CONFIG_BAT7_PAGE_PROTECTION) |\ (CONFIG_BAT7_WIMG_ICACHE) \ ) -#define CONFIG_SYS_IBAT7U (\ +#define CFG_SYS_IBAT7U (\ (CONFIG_BAT7_BASE) |\ (CONFIG_BAT7_LENGTH) |\ (CONFIG_BAT7_VALID_BITS) \ ) -#define CONFIG_SYS_DBAT7L (\ +#define CFG_SYS_DBAT7L (\ (CONFIG_BAT7_BASE) |\ (CONFIG_BAT7_PAGE_PROTECTION) |\ (CONFIG_BAT7_WIMG_DCACHE) \ ) -#define CONFIG_SYS_DBAT7U (\ +#define CFG_SYS_DBAT7U (\ (CONFIG_BAT7_BASE) |\ (CONFIG_BAT7_LENGTH) |\ (CONFIG_BAT7_VALID_BITS) \ ) #else -#define CONFIG_SYS_IBAT7L (0) -#define CONFIG_SYS_IBAT7U (0) -#define CONFIG_SYS_DBAT7L (0) -#define CONFIG_SYS_DBAT7U (0) +#define CFG_SYS_IBAT7L (0) +#define CFG_SYS_IBAT7U (0) +#define CFG_SYS_DBAT7L (0) +#define CFG_SYS_DBAT7U (0) #endif /* CONFIG_BAT7 */ diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c index 63c2729411..2af5c89ae5 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c @@ -208,24 +208,24 @@ void cpu_init_f (volatile immap_t * im) init_early_memctl_regs(); /* Local Access window setup */ -#if defined(CONFIG_SYS_LBLAWBAR0_PRELIM) && defined(CONFIG_SYS_LBLAWAR0_PRELIM) - im->sysconf.lblaw[0].bar = CONFIG_SYS_LBLAWBAR0_PRELIM; - im->sysconf.lblaw[0].ar = CONFIG_SYS_LBLAWAR0_PRELIM; +#if defined(CFG_SYS_LBLAWBAR0_PRELIM) && defined(CFG_SYS_LBLAWAR0_PRELIM) + im->sysconf.lblaw[0].bar = CFG_SYS_LBLAWBAR0_PRELIM; + im->sysconf.lblaw[0].ar = CFG_SYS_LBLAWAR0_PRELIM; #else -#error CONFIG_SYS_LBLAWBAR0_PRELIM & CONFIG_SYS_LBLAWAR0_PRELIM must be defined +#error CFG_SYS_LBLAWBAR0_PRELIM & CFG_SYS_LBLAWAR0_PRELIM must be defined #endif -#if defined(CONFIG_SYS_LBLAWBAR1_PRELIM) && defined(CONFIG_SYS_LBLAWAR1_PRELIM) - im->sysconf.lblaw[1].bar = CONFIG_SYS_LBLAWBAR1_PRELIM; - im->sysconf.lblaw[1].ar = CONFIG_SYS_LBLAWAR1_PRELIM; +#if defined(CFG_SYS_LBLAWBAR1_PRELIM) && defined(CFG_SYS_LBLAWAR1_PRELIM) + im->sysconf.lblaw[1].bar = CFG_SYS_LBLAWBAR1_PRELIM; + im->sysconf.lblaw[1].ar = CFG_SYS_LBLAWAR1_PRELIM; #endif -#if defined(CONFIG_SYS_LBLAWBAR2_PRELIM) && defined(CONFIG_SYS_LBLAWAR2_PRELIM) - im->sysconf.lblaw[2].bar = CONFIG_SYS_LBLAWBAR2_PRELIM; - im->sysconf.lblaw[2].ar = CONFIG_SYS_LBLAWAR2_PRELIM; +#if defined(CFG_SYS_LBLAWBAR2_PRELIM) && defined(CFG_SYS_LBLAWAR2_PRELIM) + im->sysconf.lblaw[2].bar = CFG_SYS_LBLAWBAR2_PRELIM; + im->sysconf.lblaw[2].ar = CFG_SYS_LBLAWAR2_PRELIM; #endif -#if defined(CONFIG_SYS_LBLAWBAR3_PRELIM) && defined(CONFIG_SYS_LBLAWAR3_PRELIM) - im->sysconf.lblaw[3].bar = CONFIG_SYS_LBLAWBAR3_PRELIM; - im->sysconf.lblaw[3].ar = CONFIG_SYS_LBLAWAR3_PRELIM; +#if defined(CFG_SYS_LBLAWBAR3_PRELIM) && defined(CFG_SYS_LBLAWAR3_PRELIM) + im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM; + im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM; #endif #if defined(CONFIG_SYS_LBLAWBAR4_PRELIM) && defined(CONFIG_SYS_LBLAWAR4_PRELIM) im->sysconf.lblaw[4].bar = CONFIG_SYS_LBLAWBAR4_PRELIM; diff --git a/arch/powerpc/cpu/mpc83xx/hid/hid.h b/arch/powerpc/cpu/mpc83xx/hid/hid.h index 9f5260c012..089d1d77f0 100644 --- a/arch/powerpc/cpu/mpc83xx/hid/hid.h +++ b/arch/powerpc/cpu/mpc83xx/hid/hid.h @@ -1,4 +1,4 @@ -#define CONFIG_SYS_HID0_FINAL ( \ +#define CFG_SYS_HID0_FINAL ( \ CONFIG_HID0_FINAL_ABE_BIT |\ CONFIG_HID0_FINAL_CLKOUT |\ CONFIG_HID0_FINAL_DCE_BIT |\ @@ -24,7 +24,7 @@ CONFIG_HID0_FINAL_SLEEP_BIT \ ) -#define CONFIG_SYS_HID0_INIT ( \ +#define CFG_SYS_HID0_INIT ( \ CONFIG_HID0_INIT_ABE_BIT |\ CONFIG_HID0_INIT_CLKOUT |\ CONFIG_HID0_INIT_DCE_BIT |\ @@ -50,12 +50,12 @@ #ifdef CONFIG_TARGET_IDS8313 /* IDS8313 defines a reserved bit; keep to not break compatibility */ -#define CONFIG_HID2_SPECIAL 0x00020000 +#define CFG_HID2_SPECIAL 0x00020000 #else -#define CONFIG_HID2_SPECIAL 0x0 +#define CFG_HID2_SPECIAL 0x0 #endif -#define CONFIG_SYS_HID2 ( \ +#define CFG_SYS_HID2 ( \ CONFIG_HID2_LET_BIT |\ CONFIG_HID2_IFEB_BIT |\ CONFIG_HID2_MESISTATE_BIT |\ @@ -68,5 +68,5 @@ CONFIG_HID2_IWLCK |\ CONFIG_HID2_ICWP_BIT |\ CONFIG_HID2_DWLCK |\ - CONFIG_HID2_SPECIAL \ + CFG_HID2_SPECIAL \ ) diff --git a/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h b/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h index 0f34267891..7f8787ffb0 100644 --- a/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h +++ b/arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h @@ -1,4 +1,4 @@ -#define CONFIG_SYS_HRCW_LOW (\ +#define CFG_SYS_HRCW_LOW (\ (CONFIG_LBMC_CLOCK_MODE << (31 - 0)) |\ (CONFIG_DDR_MC_CLOCK_MODE << (31 - 1)) |\ (CONFIG_SYSTEM_PLL_VCO_DIV << (31 - 3)) |\ @@ -9,7 +9,7 @@ (CONFIG_QUICC_MULT_FACTOR << (31 - 31)) \ ) -#define CONFIG_SYS_HRCW_HIGH (\ +#define CFG_SYS_HRCW_HIGH (\ (CONFIG_PCI_HOST_MODE << (31 - 0)) |\ (CONFIG_PCI_64BIT_MODE << (31 - 1)) |\ (CONFIG_PCI_INT_ARBITER1 << (31 - 2)) |\ diff --git a/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h b/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h index 6972afcc2c..082b2b9c9a 100644 --- a/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h +++ b/arch/powerpc/cpu/mpc83xx/lblaw/lblaw.h @@ -1,55 +1,55 @@ #if defined(CONFIG_LBLAW0) -#define CONFIG_SYS_LBLAWBAR0_PRELIM \ +#define CFG_SYS_LBLAWBAR0_PRELIM \ CONFIG_LBLAW0_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM (\ +#define CFG_SYS_LBLAWAR0_PRELIM (\ CONFIG_LBLAW0_ENABLE_BIT |\ CONFIG_LBLAW0_LENGTH \ ) #endif #if defined(CONFIG_LBLAW1) -#define CONFIG_SYS_LBLAWBAR1_PRELIM \ +#define CFG_SYS_LBLAWBAR1_PRELIM \ CONFIG_LBLAW1_BASE -#define CONFIG_SYS_LBLAWAR1_PRELIM (\ +#define CFG_SYS_LBLAWAR1_PRELIM (\ CONFIG_LBLAW1_ENABLE_BIT |\ CONFIG_LBLAW1_LENGTH \ ) #endif #if defined(CONFIG_LBLAW2) -#define CONFIG_SYS_LBLAWBAR2_PRELIM \ +#define CFG_SYS_LBLAWBAR2_PRELIM \ CONFIG_LBLAW2_BASE -#define CONFIG_SYS_LBLAWAR2_PRELIM (\ +#define CFG_SYS_LBLAWAR2_PRELIM (\ CONFIG_LBLAW2_ENABLE_BIT |\ CONFIG_LBLAW2_LENGTH \ ) #endif #if defined(CONFIG_LBLAW3) -#define CONFIG_SYS_LBLAWBAR3_PRELIM \ +#define CFG_SYS_LBLAWBAR3_PRELIM \ CONFIG_LBLAW3_BASE -#define CONFIG_SYS_LBLAWAR3_PRELIM (\ +#define CFG_SYS_LBLAWAR3_PRELIM (\ CONFIG_LBLAW3_ENABLE_BIT |\ CONFIG_LBLAW3_LENGTH \ ) #endif #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_0 -#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR0_PRELIM -#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR0_PRELIM +#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR0_PRELIM +#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR0_PRELIM #endif #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_1 -#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM -#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM +#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR1_PRELIM +#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR1_PRELIM #endif #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_2 -#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR2_PRELIM -#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR2_PRELIM +#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR2_PRELIM +#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR2_PRELIM #endif #ifdef CONFIG_NAND_LBLAWBAR_PRELIM_3 -#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR3_PRELIM -#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR3_PRELIM +#define CFG_SYS_NAND_LBLAWBAR_PRELIM CFG_SYS_LBLAWBAR3_PRELIM +#define CFG_SYS_NAND_LBLAWAR_PRELIM CFG_SYS_LBLAWAR3_PRELIM #endif diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c index 4f982b8303..6da8fc4381 100644 --- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c +++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c @@ -66,8 +66,8 @@ void board_add_ram_info(int use_default) } #ifdef CONFIG_SPD_EEPROM -#ifndef CONFIG_SYS_READ_SPD -#define CONFIG_SYS_READ_SPD i2c_read +#ifndef CFG_SYS_READ_SPD +#define CFG_SYS_READ_SPD i2c_read #endif #ifndef SPD_EEPROM_OFFSET #define SPD_EEPROM_OFFSET 0 @@ -167,7 +167,7 @@ long int spd_sdram() isync(); /* Read SPD parameters with I2C */ - CONFIG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET, + CFG_SYS_READ_SPD(SPD_EEPROM_ADDRESS, SPD_EEPROM_OFFSET, SPD_EEPROM_ADDR_LEN, (uchar *) &spd, sizeof(spd)); #ifdef SPD_DEBUG spd_debug(&spd); diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c index 7cc0383afb..b55bfaffca 100644 --- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c +++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c @@ -73,14 +73,14 @@ void cpu_init_f (volatile immap_t * im) #if defined(CFG_SYS_NAND_BR_PRELIM) \ && defined(CFG_SYS_NAND_OR_PRELIM) \ - && defined(CONFIG_SYS_NAND_LBLAWBAR_PRELIM) \ - && defined(CONFIG_SYS_NAND_LBLAWAR_PRELIM) + && defined(CFG_SYS_NAND_LBLAWBAR_PRELIM) \ + && defined(CFG_SYS_NAND_LBLAWAR_PRELIM) set_lbc_br(0, CFG_SYS_NAND_BR_PRELIM); set_lbc_or(0, CFG_SYS_NAND_OR_PRELIM); - im->sysconf.lblaw[0].bar = CONFIG_SYS_NAND_LBLAWBAR_PRELIM; - im->sysconf.lblaw[0].ar = CONFIG_SYS_NAND_LBLAWAR_PRELIM; + im->sysconf.lblaw[0].bar = CFG_SYS_NAND_LBLAWBAR_PRELIM; + im->sysconf.lblaw[0].ar = CFG_SYS_NAND_LBLAWAR_PRELIM; #else -#error CFG_SYS_NAND_BR_PRELIM, CFG_SYS_NAND_OR_PRELIM, CONFIG_SYS_NAND_LBLAWBAR_PRELIM & CONFIG_SYS_NAND_LBLAWAR_PRELIM must be defined +#error CFG_SYS_NAND_BR_PRELIM, CFG_SYS_NAND_OR_PRELIM, CFG_SYS_NAND_LBLAWBAR_PRELIM & CFG_SYS_NAND_LBLAWAR_PRELIM must be defined #endif } diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 52326f0ec1..e3878e431f 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -46,7 +46,7 @@ #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NAND_SPL) && \ !defined(CONFIG_SYS_RAMBOOT) -#define CONFIG_SYS_FLASHBOOT +#define CFG_SYS_FLASHBOOT #endif /* @@ -81,8 +81,8 @@ .fill 8,1,(((w)>> 8)&0xff); \ .fill 8,1,(((w) )&0xff) - _HRCW_TABLE_ENTRY(CONFIG_SYS_HRCW_LOW) - _HRCW_TABLE_ENTRY(CONFIG_SYS_HRCW_HIGH) + _HRCW_TABLE_ENTRY(CFG_SYS_HRCW_LOW) + _HRCW_TABLE_ENTRY(CFG_SYS_HRCW_HIGH) /* * Magic number and version string - put it after the HRCW since it @@ -180,7 +180,7 @@ _start: /* time t 0 */ bl init_e300_core -#ifdef CONFIG_SYS_FLASHBOOT +#ifdef CFG_SYS_FLASHBOOT /* Inflate flash location so it appears everywhere, calculate */ /* the absolute address in final location of the FLASH, jump */ @@ -196,7 +196,7 @@ in_flash: #if 1 /* Remapping flash with LAW0. */ bl remap_flash_by_law0 #endif -#endif /* CONFIG_SYS_FLASHBOOT */ +#endif /* CFG_SYS_FLASHBOOT */ /* setup the bats */ bl setup_bats @@ -525,18 +525,18 @@ init_e300_core: /* time t 10 */ /* - force invalidation of data and instruction caches */ /*------------------------------------------------------*/ - lis r3, CONFIG_SYS_HID0_INIT@h - ori r3, r3, (CONFIG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l + lis r3, CFG_SYS_HID0_INIT@h + ori r3, r3, (CFG_SYS_HID0_INIT | HID0_ICFI | HID0_DCFI)@l SYNC mtspr HID0, r3 - lis r3, CONFIG_SYS_HID0_FINAL@h - ori r3, r3, (CONFIG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l + lis r3, CFG_SYS_HID0_FINAL@h + ori r3, r3, (CFG_SYS_HID0_FINAL & ~(HID0_ICFI | HID0_DCFI))@l SYNC mtspr HID0, r3 - lis r3, CONFIG_SYS_HID2@h - ori r3, r3, CONFIG_SYS_HID2@l + lis r3, CFG_SYS_HID2@h + ori r3, r3, CFG_SYS_HID2@l SYNC mtspr HID2, r3 @@ -550,131 +550,131 @@ setup_bats: addis r0, r0, 0x0000 /* IBAT 0 */ - addis r4, r0, CONFIG_SYS_IBAT0L@h - ori r4, r4, CONFIG_SYS_IBAT0L@l - addis r3, r0, CONFIG_SYS_IBAT0U@h - ori r3, r3, CONFIG_SYS_IBAT0U@l + addis r4, r0, CFG_SYS_IBAT0L@h + ori r4, r4, CFG_SYS_IBAT0L@l + addis r3, r0, CFG_SYS_IBAT0U@h + ori r3, r3, CFG_SYS_IBAT0U@l mtspr IBAT0L, r4 mtspr IBAT0U, r3 /* DBAT 0 */ - addis r4, r0, CONFIG_SYS_DBAT0L@h - ori r4, r4, CONFIG_SYS_DBAT0L@l - addis r3, r0, CONFIG_SYS_DBAT0U@h - ori r3, r3, CONFIG_SYS_DBAT0U@l + addis r4, r0, CFG_SYS_DBAT0L@h + ori r4, r4, CFG_SYS_DBAT0L@l + addis r3, r0, CFG_SYS_DBAT0U@h + ori r3, r3, CFG_SYS_DBAT0U@l mtspr DBAT0L, r4 mtspr DBAT0U, r3 /* IBAT 1 */ - addis r4, r0, CONFIG_SYS_IBAT1L@h - ori r4, r4, CONFIG_SYS_IBAT1L@l - addis r3, r0, CONFIG_SYS_IBAT1U@h - ori r3, r3, CONFIG_SYS_IBAT1U@l + addis r4, r0, CFG_SYS_IBAT1L@h + ori r4, r4, CFG_SYS_IBAT1L@l + addis r3, r0, CFG_SYS_IBAT1U@h + ori r3, r3, CFG_SYS_IBAT1U@l mtspr IBAT1L, r4 mtspr IBAT1U, r3 /* DBAT 1 */ - addis r4, r0, CONFIG_SYS_DBAT1L@h - ori r4, r4, CONFIG_SYS_DBAT1L@l - addis r3, r0, CONFIG_SYS_DBAT1U@h - ori r3, r3, CONFIG_SYS_DBAT1U@l + addis r4, r0, CFG_SYS_DBAT1L@h + ori r4, r4, CFG_SYS_DBAT1L@l + addis r3, r0, CFG_SYS_DBAT1U@h + ori r3, r3, CFG_SYS_DBAT1U@l mtspr DBAT1L, r4 mtspr DBAT1U, r3 /* IBAT 2 */ - addis r4, r0, CONFIG_SYS_IBAT2L@h - ori r4, r4, CONFIG_SYS_IBAT2L@l - addis r3, r0, CONFIG_SYS_IBAT2U@h - ori r3, r3, CONFIG_SYS_IBAT2U@l + addis r4, r0, CFG_SYS_IBAT2L@h + ori r4, r4, CFG_SYS_IBAT2L@l + addis r3, r0, CFG_SYS_IBAT2U@h + ori r3, r3, CFG_SYS_IBAT2U@l mtspr IBAT2L, r4 mtspr IBAT2U, r3 /* DBAT 2 */ - addis r4, r0, CONFIG_SYS_DBAT2L@h - ori r4, r4, CONFIG_SYS_DBAT2L@l - addis r3, r0, CONFIG_SYS_DBAT2U@h - ori r3, r3, CONFIG_SYS_DBAT2U@l + addis r4, r0, CFG_SYS_DBAT2L@h + ori r4, r4, CFG_SYS_DBAT2L@l + addis r3, r0, CFG_SYS_DBAT2U@h + ori r3, r3, CFG_SYS_DBAT2U@l mtspr DBAT2L, r4 mtspr DBAT2U, r3 /* IBAT 3 */ - addis r4, r0, CONFIG_SYS_IBAT3L@h - ori r4, r4, CONFIG_SYS_IBAT3L@l - addis r3, r0, CONFIG_SYS_IBAT3U@h - ori r3, r3, CONFIG_SYS_IBAT3U@l + addis r4, r0, CFG_SYS_IBAT3L@h + ori r4, r4, CFG_SYS_IBAT3L@l + addis r3, r0, CFG_SYS_IBAT3U@h + ori r3, r3, CFG_SYS_IBAT3U@l mtspr IBAT3L, r4 mtspr IBAT3U, r3 /* DBAT 3 */ - addis r4, r0, CONFIG_SYS_DBAT3L@h - ori r4, r4, CONFIG_SYS_DBAT3L@l - addis r3, r0, CONFIG_SYS_DBAT3U@h - ori r3, r3, CONFIG_SYS_DBAT3U@l + addis r4, r0, CFG_SYS_DBAT3L@h + ori r4, r4, CFG_SYS_DBAT3L@l + addis r3, r0, CFG_SYS_DBAT3U@h + ori r3, r3, CFG_SYS_DBAT3U@l mtspr DBAT3L, r4 mtspr DBAT3U, r3 #ifdef CONFIG_HIGH_BATS /* IBAT 4 */ - addis r4, r0, CONFIG_SYS_IBAT4L@h - ori r4, r4, CONFIG_SYS_IBAT4L@l - addis r3, r0, CONFIG_SYS_IBAT4U@h - ori r3, r3, CONFIG_SYS_IBAT4U@l + addis r4, r0, CFG_SYS_IBAT4L@h + ori r4, r4, CFG_SYS_IBAT4L@l + addis r3, r0, CFG_SYS_IBAT4U@h + ori r3, r3, CFG_SYS_IBAT4U@l mtspr IBAT4L, r4 mtspr IBAT4U, r3 /* DBAT 4 */ - addis r4, r0, CONFIG_SYS_DBAT4L@h - ori r4, r4, CONFIG_SYS_DBAT4L@l - addis r3, r0, CONFIG_SYS_DBAT4U@h - ori r3, r3, CONFIG_SYS_DBAT4U@l + addis r4, r0, CFG_SYS_DBAT4L@h + ori r4, r4, CFG_SYS_DBAT4L@l + addis r3, r0, CFG_SYS_DBAT4U@h + ori r3, r3, CFG_SYS_DBAT4U@l mtspr DBAT4L, r4 mtspr DBAT4U, r3 /* IBAT 5 */ - addis r4, r0, CONFIG_SYS_IBAT5L@h - ori r4, r4, CONFIG_SYS_IBAT5L@l - addis r3, r0, CONFIG_SYS_IBAT5U@h - ori r3, r3, CONFIG_SYS_IBAT5U@l + addis r4, r0, CFG_SYS_IBAT5L@h + ori r4, r4, CFG_SYS_IBAT5L@l + addis r3, r0, CFG_SYS_IBAT5U@h + ori r3, r3, CFG_SYS_IBAT5U@l mtspr IBAT5L, r4 mtspr IBAT5U, r3 /* DBAT 5 */ - addis r4, r0, CONFIG_SYS_DBAT5L@h - ori r4, r4, CONFIG_SYS_DBAT5L@l - addis r3, r0, CONFIG_SYS_DBAT5U@h - ori r3, r3, CONFIG_SYS_DBAT5U@l + addis r4, r0, CFG_SYS_DBAT5L@h + ori r4, r4, CFG_SYS_DBAT5L@l + addis r3, r0, CFG_SYS_DBAT5U@h + ori r3, r3, CFG_SYS_DBAT5U@l mtspr DBAT5L, r4 mtspr DBAT5U, r3 /* IBAT 6 */ - addis r4, r0, CONFIG_SYS_IBAT6L@h - ori r4, r4, CONFIG_SYS_IBAT6L@l - addis r3, r0, CONFIG_SYS_IBAT6U@h - ori r3, r3, CONFIG_SYS_IBAT6U@l + addis r4, r0, CFG_SYS_IBAT6L@h + ori r4, r4, CFG_SYS_IBAT6L@l + addis r3, r0, CFG_SYS_IBAT6U@h + ori r3, r3, CFG_SYS_IBAT6U@l mtspr IBAT6L, r4 mtspr IBAT6U, r3 /* DBAT 6 */ - addis r4, r0, CONFIG_SYS_DBAT6L@h - ori r4, r4, CONFIG_SYS_DBAT6L@l - addis r3, r0, CONFIG_SYS_DBAT6U@h - ori r3, r3, CONFIG_SYS_DBAT6U@l + addis r4, r0, CFG_SYS_DBAT6L@h + ori r4, r4, CFG_SYS_DBAT6L@l + addis r3, r0, CFG_SYS_DBAT6U@h + ori r3, r3, CFG_SYS_DBAT6U@l mtspr DBAT6L, r4 mtspr DBAT6U, r3 /* IBAT 7 */ - addis r4, r0, CONFIG_SYS_IBAT7L@h - ori r4, r4, CONFIG_SYS_IBAT7L@l - addis r3, r0, CONFIG_SYS_IBAT7U@h - ori r3, r3, CONFIG_SYS_IBAT7U@l + addis r4, r0, CFG_SYS_IBAT7L@h + ori r4, r4, CFG_SYS_IBAT7L@l + addis r3, r0, CFG_SYS_IBAT7U@h + ori r3, r3, CFG_SYS_IBAT7U@l mtspr IBAT7L, r4 mtspr IBAT7U, r3 /* DBAT 7 */ - addis r4, r0, CONFIG_SYS_DBAT7L@h - ori r4, r4, CONFIG_SYS_DBAT7L@l - addis r3, r0, CONFIG_SYS_DBAT7U@h - ori r3, r3, CONFIG_SYS_DBAT7U@l + addis r4, r0, CFG_SYS_DBAT7L@h + ori r4, r4, CFG_SYS_DBAT7L@l + addis r3, r0, CFG_SYS_DBAT7U@h + ori r3, r3, CFG_SYS_DBAT7U@l mtspr DBAT7L, r4 mtspr DBAT7U, r3 #endif @@ -1095,7 +1095,7 @@ unlock_ram_in_cache: #endif /* !MINIMAL_SPL */ #endif /* CONFIG_SYS_INIT_RAM_LOCK */ -#ifdef CONFIG_SYS_FLASHBOOT +#ifdef CFG_SYS_FLASHBOOT map_flash_by_law1: /* When booting from ROM (Flash or EPROM), clear the */ /* Address Mask in OR0 so ROM appears everywhere */ @@ -1182,4 +1182,4 @@ remap_flash_by_law0: twi 0,r4,0 isync blr -#endif /* CONFIG_SYS_FLASHBOOT */ +#endif /* CFG_SYS_FLASHBOOT */ |