diff options
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/global_data.h | 3 | ||||
| -rw-r--r-- | arch/m68k/include/asm/immap.h | 24 |
2 files changed, 15 insertions, 12 deletions
diff --git a/arch/m68k/include/asm/global_data.h b/arch/m68k/include/asm/global_data.h index 273e843c4a..5f576ba16f 100644 --- a/arch/m68k/include/asm/global_data.h +++ b/arch/m68k/include/asm/global_data.h @@ -23,6 +23,9 @@ struct arch_global_data { #ifdef CONFIG_MCF5441x unsigned long sdhc_clk; #endif +#if defined(CONFIG_FSL_ESDHC) + u32 sdhc_per_clk; +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index 8207c8d5b7..74516cc621 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -16,7 +16,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -38,7 +38,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -63,7 +63,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -86,7 +86,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) @@ -105,7 +105,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -130,7 +130,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_TMR0) #define CFG_SYS_TMR_BASE (MMAP_TMR3) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) @@ -152,7 +152,7 @@ #define CFG_SYS_NUM_IRQS (192) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -174,7 +174,7 @@ #define CFG_SYS_NUM_IRQS (128) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR3) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) @@ -196,7 +196,7 @@ #define CFG_SYS_NUM_IRQS (64) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ @@ -217,7 +217,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -239,7 +239,7 @@ #define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) @@ -269,7 +269,7 @@ #define MMAP_DSPI MMAP_DSPI0 /* Timer */ -#ifdef CONFIG_MCFTMR +#ifdef CFG_MCFTMR #define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) #define CFG_SYS_TMR_BASE (MMAP_DTMR1) #define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) |