diff options
Diffstat (limited to 'arch/m68k/include/asm/immap.h')
| -rw-r--r-- | arch/m68k/include/asm/immap.h | 306 |
1 files changed, 145 insertions, 161 deletions
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index dab8b26a70..8207c8d5b7 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -13,67 +13,65 @@ #include <asm/immap_520x.h> #include <asm/m520x.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) -#define CONFIG_SYS_TMRINTR_NO (INT0_HI_DTMR1) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (6) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) +#define CFG_SYS_TMRINTR_NO (INT0_HI_DTMR1) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (6) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #endif /* CONFIG_M520x */ #ifdef CONFIG_M5235 #include <asm/immap_5235.h> #include <asm/m5235.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR3) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprl0) -#define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR3) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) +#define CFG_SYS_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5235 */ #ifdef CONFIG_M5249 #include <asm/immap_5249.h> #include <asm/m5249.h> -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC) -#define CONFIG_SYS_NUM_IRQS (64) +#define CFG_SYS_INTR_BASE (MMAP_INTC) +#define CFG_SYS_NUM_IRQS (64) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) -#define CONFIG_SYS_TMRINTR_NO (31) -#define CONFIG_SYS_TMRINTR_MASK (0x00000400) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) +#define CFG_SYS_TMRINTR_NO (31) +#define CFG_SYS_TMRINTR_MASK (0x00000400) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) #endif #endif /* CONFIG_M5249 */ @@ -82,21 +80,21 @@ #include <asm/m5249.h> #include <asm/m5253.h> -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC) -#define CONFIG_SYS_NUM_IRQS (64) +#define CFG_SYS_INTR_BASE (MMAP_INTC) +#define CFG_SYS_NUM_IRQS (64) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) -#define CONFIG_SYS_TMRINTR_NO (27) -#define CONFIG_SYS_TMRINTR_MASK (0x00000400) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR)) +#define CFG_SYS_TMRINTR_NO (27) +#define CFG_SYS_TMRINTR_MASK (0x00000400) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8) #endif #endif /* CONFIG_M5253 */ @@ -104,45 +102,43 @@ #include <asm/immap_5271.h> #include <asm/m5271.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR3) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprl0) -#define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR3) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) +#define CFG_SYS_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */ +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5271 */ #ifdef CONFIG_M5272 #include <asm/immap_5272.h> #include <asm/m5272.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC) -#define CONFIG_SYS_NUM_IRQS (64) +#define CFG_SYS_INTR_BASE (MMAP_INTC) +#define CFG_SYS_NUM_IRQS (64) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_TMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_TMR3) -#define CONFIG_SYS_TMRPND_REG (((volatile intctrl_t *)(CONFIG_SYS_INTR_BASE))->int_isr) -#define CONFIG_SYS_TMRINTR_NO (INT_TMR3) -#define CONFIG_SYS_TMRINTR_MASK (INT_ISR_INT24) -#define CONFIG_SYS_TMRINTR_PEND (0) -#define CONFIG_SYS_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5)) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_TMR0) +#define CFG_SYS_TMR_BASE (MMAP_TMR3) +#define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr) +#define CFG_SYS_TMRINTR_NO (INT_TMR3) +#define CFG_SYS_TMRINTR_MASK (INT_ISR_INT24) +#define CFG_SYS_TMRINTR_PEND (0) +#define CFG_SYS_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5)) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif #endif /* CONFIG_M5272 */ @@ -150,23 +146,21 @@ #include <asm/immap_5275.h> #include <asm/m5275.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (192) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (192) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR3) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprl0) -#define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0x1E) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR3) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) +#define CFG_SYS_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRL_INT22) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (0x1E) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif #endif /* CONFIG_M5275 */ @@ -174,22 +168,21 @@ #include <asm/immap_5282.h> #include <asm/m5282.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR3) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprl0) -#define CONFIG_SYS_TMRINTR_NO (INT0_LO_DTMR3) -#define CONFIG_SYS_TMRINTR_MASK (1 << INT0_LO_DTMR3) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR3) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0) +#define CFG_SYS_TMRINTR_NO (INT0_LO_DTMR3) +#define CFG_SYS_TMRINTR_MASK (1 << INT0_LO_DTMR3) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */ +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif #endif /* CONFIG_M5282 */ @@ -197,23 +190,23 @@ #include <asm/immap_5307.h> #include <asm/m5307.h> -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + \ +#define CFG_SYS_UART_BASE (MMAP_UART0 + \ (CFG_SYS_UART_PORT * 0x40)) -#define CONFIG_SYS_INTR_BASE (MMAP_INTC) -#define CONFIG_SYS_NUM_IRQS (64) +#define CFG_SYS_INTR_BASE (MMAP_INTC) +#define CFG_SYS_NUM_IRQS (64) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (((volatile intctrl_t *) \ - (CONFIG_SYS_INTR_BASE))->ipr) -#define CONFIG_SYS_TMRINTR_NO (31) -#define CONFIG_SYS_TMRINTR_MASK (0x00000400) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \ +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \ + (CFG_SYS_INTR_BASE))->ipr) +#define CFG_SYS_TMRINTR_NO (31) +#define CFG_SYS_TMRINTR_MASK (0x00000400) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \ MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif #endif /* CONFIG_M5307 */ @@ -221,61 +214,55 @@ #include <asm/immap_5301x.h> #include <asm/m5301x.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) -#define CONFIG_SYS_TMRINTR_NO (INT0_HI_DTMR1) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (6) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) +#define CFG_SYS_TMRINTR_NO (INT0_HI_DTMR1) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (6) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5301x */ #if defined(CONFIG_M5329) || defined(CONFIG_M5373) #include <asm/immap_5329.h> #include <asm/m5329.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000)) /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) -#define CONFIG_SYS_TMRINTR_NO (INT0_HI_DTMR1) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (6) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) +#define CFG_SYS_TMRINTR_NO (INT0_HI_DTMR1) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (6) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #endif /* CONFIG_M5329 && CONFIG_M5373 */ #if defined(CONFIG_M54418) #include <asm/immap_5441x.h> #include <asm/m5441x.h> -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) - #if (CFG_SYS_UART_PORT < 4) -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + \ +#define CFG_SYS_UART_BASE (MMAP_UART0 + \ (CFG_SYS_UART_PORT * 0x4000)) #else -#define CONFIG_SYS_UART_BASE (MMAP_UART4 + \ +#define CFG_SYS_UART_BASE (MMAP_UART4 + \ ((CFG_SYS_UART_PORT - 4) * 0x4000)) #endif @@ -283,18 +270,18 @@ /* Timer */ #ifdef CONFIG_MCFTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_DTMR0) -#define CONFIG_SYS_TMR_BASE (MMAP_DTMR1) -#define CONFIG_SYS_TMRPND_REG (((int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) -#define CONFIG_SYS_TMRINTR_NO (INT0_HI_DTMR1) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (6) -#define CONFIG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) +#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0) +#define CFG_SYS_TMR_BASE (MMAP_DTMR1) +#define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0) +#define CFG_SYS_TMRINTR_NO (INT0_HI_DTMR1) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRH_INT33) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (6) +#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (192) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (192) #endif /* CONFIG_M54418 */ @@ -303,9 +290,6 @@ #include <asm/m547x_8x.h> #ifdef CONFIG_FSLDMAFEC -#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) - #define FEC0_RX_TASK 0 #define FEC0_TX_TASK 1 #define FEC0_RX_PRIORITY 6 @@ -320,21 +304,21 @@ #define FEC1_TX_INIT 31 #endif -#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x100)) +#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x100)) #ifdef CONFIG_SLTTMR -#define CONFIG_SYS_UDELAY_BASE (MMAP_SLT1) -#define CONFIG_SYS_TMR_BASE (MMAP_SLT0) -#define CONFIG_SYS_TMRPND_REG (((volatile int0_t *)(CONFIG_SYS_INTR_BASE))->iprh0) -#define CONFIG_SYS_TMRINTR_NO (INT0_HI_SLT0) -#define CONFIG_SYS_TMRINTR_MASK (INTC_IPRH_INT54) -#define CONFIG_SYS_TMRINTR_PEND (CONFIG_SYS_TMRINTR_MASK) -#define CONFIG_SYS_TMRINTR_PRI (0x1E) -#define CONFIG_SYS_TIMER_PRESCALER (gd->bus_clk / 1000000) +#define CFG_SYS_UDELAY_BASE (MMAP_SLT1) +#define CFG_SYS_TMR_BASE (MMAP_SLT0) +#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0) +#define CFG_SYS_TMRINTR_NO (INT0_HI_SLT0) +#define CFG_SYS_TMRINTR_MASK (INTC_IPRH_INT54) +#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK) +#define CFG_SYS_TMRINTR_PRI (0x1E) +#define CFG_SYS_TIMER_PRESCALER (gd->bus_clk / 1000000) #endif -#define CONFIG_SYS_INTR_BASE (MMAP_INTC0) -#define CONFIG_SYS_NUM_IRQS (128) +#define CFG_SYS_INTR_BASE (MMAP_INTC0) +#define CFG_SYS_NUM_IRQS (128) #ifdef CONFIG_PCI #define CFG_SYS_PCI_BAR0 (0x40000000) |