diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/cpu/armv8/smccc-call.S | 57 | ||||
| -rw-r--r-- | arch/arm/lib/asm-offsets.c | 16 |
2 files changed, 1 insertions, 72 deletions
diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index 93f66d3366..dc92b28777 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -1,11 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited - * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> - * - * Authors: - * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> -*/ + */ #include <linux/linkage.h> #include <linux/arm-smccc.h> #include <generated/asm-offsets.h> @@ -49,54 +45,3 @@ ENDPROC(__arm_smccc_smc) ENTRY(__arm_smccc_hvc) SMCCC hvc ENDPROC(__arm_smccc_hvc) - -#ifdef CONFIG_ARM64 - - .macro SMCCC_1_2 instr - /* Save `res` and free a GPR that won't be clobbered */ - stp x1, x19, [sp, #-16]! - - /* Ensure `args` won't be clobbered while loading regs in next step */ - mov x19, x0 - - /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */ - ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] - ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] - ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] - ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] - ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] - ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] - ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] - ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] - ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] - - \instr #0 - - /* Load the `res` from the stack */ - ldr x19, [sp] - - /* Store the registers x0 - x17 into the result structure */ - stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] - stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] - stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] - stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] - stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] - stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] - stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] - stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] - stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] - - /* Restore original x19 */ - ldp xzr, x19, [sp], #16 - ret - .endm - -/* - * void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, - * struct arm_smccc_1_2_regs *res); - */ -ENTRY(arm_smccc_1_2_smc) - SMCCC_1_2 smc -ENDPROC(arm_smccc_1_2_smc) - -#endif diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 181a8ac4c2..6de0ce9152 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -9,11 +9,6 @@ * generate asm statements containing #defines, * compile this file to assembler, and then extract the * #defines from the assembly-language output. - * - * Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com> - * - * Authors: - * Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com> */ #include <common.h> @@ -95,17 +90,6 @@ int main(void) DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); -#ifdef CONFIG_ARM64 - DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0)); - DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2)); - DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4)); - DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6)); - DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8)); - DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10)); - DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12)); - DEFINE(ARM_SMCCC_1_2_REGS_X14_OFFS, offsetof(struct arm_smccc_1_2_regs, a14)); - DEFINE(ARM_SMCCC_1_2_REGS_X16_OFFS, offsetof(struct arm_smccc_1_2_regs, a16)); -#endif #endif return 0; |