diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/mxs.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_boot.c | 2 | ||||
-rw-r--r-- | arch/arm/cpu/armv7/ls102xa/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/spl.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-imx/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-imx/imx8/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/mach-rockchip/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-stm32mp/boot_params.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-sunxi/Kconfig | 4 |
10 files changed, 11 insertions, 15 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c index 4d21e3df76..6d6166cb83 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mxs.c +++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c @@ -100,7 +100,7 @@ int arch_cpu_init(void) struct mxs_clkctrl_regs *clkctrl_regs = (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE; - mx28_fixup_vt((uint32_t)&_start); + mx28_fixup_vt((uint32_t)_start); /* * Enable NAND clock diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c index 5598c552ab..5e7bdb78be 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c @@ -103,7 +103,7 @@ static void mxs_spl_fixup_vectors(void) */ /* cppcheck-suppress nullPointer */ - memcpy(0x0, &_start, 0x60); + memcpy(0x0, _start, 0x60); } static void mxs_spl_console_init(void) diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 3e292bf70e..46ace7e5fd 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -98,7 +98,6 @@ config SYS_FSL_ERRATUM_A008407 config SYS_FSL_QSPI_SKIP_CLKSEL bool "Skip setting QSPI clock during SoC init" - default 0 help To improve startup times when booting from QSPI flash, the QSPI frequency can be set very early in the boot process. If this option diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index a8b493e2f8..d46934c2dc 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -739,7 +739,7 @@ config HAS_FSL_XHCI_USB config SYS_FSL_BOOTROM_BASE hex depends on FSL_LSCH2 - default 0 + default 0x0 config SYS_FSL_BOOTROM_SIZE hex diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index 0ece4b0906..ee79a19c05 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -34,9 +34,6 @@ enum { }; #endif -/* Linker symbols. */ -extern char __bss_start[], __bss_end[]; - #ifndef CONFIG_DM extern gd_t gdata; #endif diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index d94b5828d0..2136ab7e9e 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -181,7 +181,7 @@ config IMX8_ROMAPI config SPL_IMX_ROMAPI_LOADADDR hex "Default load address to load image through ROM API" depends on IMX8_ROMAPI || SPL_BOOTROM_SUPPORT - default 0 + default 0x0 config IMX_DCD_ADDR hex "DCD Blocks location on the image" diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 15f844f503..59d11b3179 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -34,11 +34,11 @@ config SYS_SOC config BOOTAUX_RESERVED_MEM_BASE hex "i.MX auxiliary core dram memory base" - default 0 + default 0x0 config BOOTAUX_RESERVED_MEM_SIZE hex "i.MX auxiliary core dram memory size" - default 0 + default 0x0 choice prompt "i.MX8 board select" diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index 49da93d54b..4569a9ce28 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -469,7 +469,7 @@ config ROCKCHIP_STIMER_BASE config ROCKCHIP_SPL_RESERVE_IRAM hex "Size of IRAM reserved in SPL" - default 0 + default 0x0 help SPL may need reserve memory for firmware loaded by SPL, whose load address is in IRAM and may overlay with SPL text area if not diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c index 24d04dcf0f..158bf40cb9 100644 --- a/arch/arm/mach-stm32mp/boot_params.c +++ b/arch/arm/mach-stm32mp/boot_params.c @@ -29,7 +29,7 @@ void *board_fdt_blob_setup(int *err) return (void *)nt_fw_dtb; log_debug("%s: DTB not found.\n", __func__); } - log_debug("%s: fall back to builtin DTB, %p\n", __func__, &_end); + log_debug("%s: fall back to builtin DTB, %p\n", __func__, _end); - return (void *)&_end; + return (void *)_end; } diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index e20c3a3ee9..9d5df2c102 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -568,7 +568,7 @@ config DRAM_EMR1 config DRAM_TPR3 hex "sunxi dram tpr3 value" - default 0 + default 0x0 ---help--- Set the dram controller tpr3 parameter. This parameter configures the delay on the command lane and also phase shifts, which are @@ -579,7 +579,7 @@ config DRAM_TPR3 config DRAM_DQS_GATING_DELAY hex "sunxi dram dqs_gating_delay value" - default 0 + default 0x0 ---help--- Set the dram controller dqs_gating_delay parmeter. Each byte encodes the DQS gating delay for each byte lane. The delay |