diff options
Diffstat (limited to 'arch/arm/mach-uniphier')
| -rw-r--r-- | arch/arm/mach-uniphier/Kconfig | 2 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-ld4.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pro4.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/dram/ddrphy-training.c | 18 |
5 files changed, 12 insertions, 26 deletions
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index de3bdc0bc2..cc759b3e01 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -117,4 +117,6 @@ config CMD_DDRMPHY_DUMP The command "ddrmphy" shows the resulting parameters of DDR Multi PHY training; it is useful for the evaluation of DDR Multi PHY training. +config SYS_SOC + default "uniphier-v7" if ARCH_UNIPHIER_LD4_SLD8 || ARCH_UNIPHIER_V7_MULTI endif diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index def87c1aac..64fa12ea5e 100644 --- a/arch/arm/mach-uniphier/clk/clk-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c @@ -17,9 +17,6 @@ void uniphier_ld4_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -28,9 +25,6 @@ void uniphier_ld4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 8a978d20ff..09c03cd9f5 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -21,9 +21,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -43,9 +40,6 @@ void uniphier_pro4_clk_init(void) tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_USB_EHCI_HCD tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 9775127650..27fb2f44b4 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -19,9 +19,6 @@ void uniphier_pxs2_clk_init(void) #ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_RSTCTRL_NRST_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_RSTCTRL_NRST_NAND; #endif @@ -45,9 +42,6 @@ void uniphier_pxs2_clk_init(void) tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif -#ifdef CONFIG_UNIPHIER_ETH - tmp |= SC_CLKCTRL_CEN_ETHER; -#endif #ifdef CONFIG_NAND_DENALI tmp |= SC_CLKCTRL_CEN_NAND; #endif diff --git a/arch/arm/mach-uniphier/dram/ddrphy-training.c b/arch/arm/mach-uniphier/dram/ddrphy-training.c index fa29a43062..6efdd43b37 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-training.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-training.c @@ -5,9 +5,13 @@ * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> +#include <linux/bitops.h> +#include <linux/delay.h> #include <linux/errno.h> #include <linux/io.h> +#include <linux/kernel.h> +#include <linux/printk.h> +#include <time.h> #include "ddrphy-init.h" #include "ddrphy-regs.h" @@ -108,7 +112,7 @@ int ddrphy_training(void __iomem *phy_base) u32 init_flag = PHY_PIR_INIT; u32 done_flag = PHY_PGSR0_IDONE; int timeout = 50000; /* 50 msec is long enough */ -#ifdef DISPLAY_ELAPSED_TIME +#ifdef DEBUG ulong start = get_timer(0); #endif @@ -121,8 +125,7 @@ int ddrphy_training(void __iomem *phy_base) do { if (--timeout < 0) { - printf("%s: error: timeout during DDR training\n", - __func__); + pr_err("timeout during DDR training\n"); return -ETIMEDOUT; } udelay(1); @@ -131,14 +134,13 @@ int ddrphy_training(void __iomem *phy_base) for (i = 0; i < ARRAY_SIZE(init_sequence); i++) { if (pgsr0 & init_sequence[i].err_flag) { - printf("%s: error: %s failed\n", __func__, - init_sequence[i].description); + pr_err("%s failed\n", init_sequence[i].description); return -EIO; } } -#ifdef DISPLAY_ELAPSED_TIME - printf("%s: info: elapsed time %ld msec\n", get_timer(start)); +#ifdef DEBUG + pr_debug("DDR training: elapsed time %ld msec\n", get_timer(start)); #endif return 0; |