3 files changed, 14 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h
index 84308e04b3..457f99d2c5 100644
--- a/arch/arm/include/asm/arch-omap3/cpu.h
+++ b/arch/arm/include/asm/arch-omap3/cpu.h
@@ -474,12 +474,11 @@ struct prm {
 	u8 res3[0x1c];
 	u32 clksrc_ctrl;	/* 0x1270 */
 };
-#else /* __ASSEMBLY__ */
-#define PRM_RSTCTRL		0x48307250
-#define PRM_RSTCTRL_RESET	0x04
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL_STRICT_NAMES */
 
+#define PRM_RSTCTRL		0x48307250
+#define PRM_RSTCTRL_RESET	0x04
 #define SYSCLKDIV_1		(0x1 << 6)
 #define SYSCLKDIV_2		(0x1 << 7)
 
diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
index f8c42c0d20..3ce1f07b8a 100644
--- a/arch/arm/include/asm/arch-omap3/mmc_host_def.h
+++ b/arch/arm/include/asm/arch-omap3/mmc_host_def.h
@@ -33,7 +33,9 @@ typedef struct t2 {
 	unsigned int devconf0;		/* 0x274 */
 	unsigned char res2[0x060];	/* 0x278 */
 	unsigned int devconf1;		/* 0x2D8 */
-	unsigned char res3[0x244];	/* 0x2DC */
+	unsigned char res3[0x16C];	/* 0x2DC */
+	unsigned int ctl_prog_io1;	/* 0x448 */
+	unsigned char res4[0x0D4];	/* 0x44C */
 	unsigned int pbias_lite;	/* 0x520 */
 } t2_t;
 
@@ -48,6 +50,8 @@ typedef struct t2 {
 #define PBIASSPEEDCTRL0			(1 << 2)
 #define PBIASLITEPWRDNZ1		(1 << 9)
 
+#define CTLPROGIO1SPEEDCTRL		(1 << 20)
+
 /*
  * OMAP HSMMC register definitions
  */
@@ -191,6 +195,6 @@ struct hsmmc {
 #define mmc_reg_out(addr, mask, val)\
 	writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr))
 
-int omap_mmc_init(int dev_index);
+int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max);
 
 #endif /* MMC_HOST_DEF_H */
diff --git a/arch/arm/include/asm/arch-omap3/mux.h b/arch/arm/include/asm/arch-omap3/mux.h
index 6daef49e97..71f183de8d 100644
--- a/arch/arm/include/asm/arch-omap3/mux.h
+++ b/arch/arm/include/asm/arch-omap3/mux.h
@@ -445,6 +445,12 @@
 #define CONTROL_PADCONF_STRBEN_DLY1	0x0224
 #define CONTROL_PADCONF_SYS_BOOT8	0x0226
 
+/* AM/DM37xx specific */
+#define CONTROL_PADCONF_GPIO127		0x0A54
+#define CONTROL_PADCONF_GPIO126		0x0A56
+#define CONTROL_PADCONF_GPIO128		0x0A58
+#define CONTROL_PADCONF_GPIO129		0x0A5A
+
 #define MUX_VAL(OFFSET,VALUE)\
 	writew((VALUE), OMAP34XX_CTRL_BASE + (OFFSET));