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-rw-r--r--arch/arm/cpu/armv7/start.S4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index af87a5432a..37036128a7 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -97,12 +97,10 @@ switch_to_hypervisor_ret:
orr r0, r0, #0xc0 @ disable FIQ and IRQ
msr cpsr,r0
+#if !CONFIG_IS_ENABLED(SYS_NO_VECTOR_TABLE)
/*
* Setup vector:
- * (OMAP4 spl TEXT_BASE is not 32 byte aligned.
- * Continue to use ROM code vector only in OMAP4 spl)
*/
-#if !(defined(CONFIG_OMAP44XX) && defined(CONFIG_SPL_BUILD))
/* Set V=0 in CP15 SCTLR register - for VBAR to point to vector */
mrc p15, 0, r0, c1, c0, 0 @ Read CP15 SCTLR Register
bic r0, #CR_V @ V = 0