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-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig1
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/config.h1
-rw-r--r--arch/arm/mach-mvebu/include/mach/config.h3
-rw-r--r--include/configs/cgtqmx8.h1
-rw-r--r--include/configs/imx8mp_rsb3720.h9
-rw-r--r--include/configs/imx8mq_cm.h1
-rw-r--r--include/configs/imx8mq_evk.h1
-rw-r--r--include/configs/imx8mq_phanbell.h1
-rw-r--r--include/configs/imx8qm_mek.h1
-rw-r--r--include/configs/imx8qxp_mek.h1
-rw-r--r--include/configs/kontron_pitx_imx8m.h1
-rw-r--r--include/configs/librem5.h6
-rw-r--r--include/configs/pico-imx8mq.h1
13 files changed, 1 insertions, 27 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 2862257e1f..9656c52e95 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -29,6 +29,7 @@ config ARCH_LS1028A
select ESBC_HDR_LS if CHAIN_OF_TRUST
select FSL_LAYERSCAPE
select FSL_LSCH3
+ select FSL_TZASC_400
select GICV3
select NXP_LSCH3_2
select SYS_FSL_HAS_CCI400
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 12758c8dd1..516c9eab04 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -160,7 +160,6 @@
#elif defined(CONFIG_ARCH_LS1028A)
#define CFG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
-#define CONFIG_FSL_TZASC_400
/* TZ Protection Controller Definitions */
#define TZPC_BASE 0x02200000
diff --git a/arch/arm/mach-mvebu/include/mach/config.h b/arch/arm/mach-mvebu/include/mach/config.h
index 96a08104ff..6102747548 100644
--- a/arch/arm/mach-mvebu/include/mach/config.h
+++ b/arch/arm/mach-mvebu/include/mach/config.h
@@ -27,7 +27,4 @@
#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
-/* Needed for SPI NOR booting in SPL */
-#define CONFIG_DM_SEQ_ALIAS 1
-
#endif /* __MVEBU_CONFIG_H */
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 91454df197..98d4d8cf4b 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -12,7 +12,6 @@
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CFG_MALLOC_F_ADDR 0x00120000
#endif
diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h
index 495ca313db..d4ab6a6207 100644
--- a/include/configs/imx8mp_rsb3720.h
+++ b/include/configs/imx8mp_rsb3720.h
@@ -28,12 +28,6 @@
* GD_FLG_FULL_MALLOC_INIT \
* set \
*/
-
-
-#if defined(CONFIG_NAND_BOOT)
-#define CONFIG_SPL_NAND_MXS
-#endif
-
#endif
/* ENET Config */
@@ -158,9 +152,6 @@
#define FSL_FSPI_FLASH_NUM 1
#define FSPI0_BASE_ADDR 0x30bb0000
#define FSPI0_AMBA_BASE 0x0
-#define CONFIG_FSPI_QUAD_SUPPORT
-
-#define CONFIG_SYS_FSL_FSPI_AHB
#endif
#ifdef CONFIG_NAND_MXS
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 828bd67237..7cf482d6de 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -11,7 +11,6 @@
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x182000
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index d2de2900c0..d2e1649400 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -12,7 +12,6 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x182000
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index bfde15e624..b66fc18fa5 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -11,7 +11,6 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x182000
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index a25efbb16b..4d5abe2d07 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -11,7 +11,6 @@
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CFG_MALLOC_F_ADDR 0x00120000
#endif
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index 4f55ae4940..9399950994 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -11,7 +11,6 @@
#include <asm/arch/imx-regs.h>
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SERIAL_LPUART_BASE 0x5a060000
#define CFG_MALLOC_F_ADDR 0x00120000
#endif
diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h
index e3a021c987..5cf6b5a6dd 100644
--- a/include/configs/kontron_pitx_imx8m.h
+++ b/include/configs/kontron_pitx_imx8m.h
@@ -13,7 +13,6 @@
0x40, 0xd4, 0x5c, 0xca, 0x13, 0x99)
#ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x182000
diff --git a/include/configs/librem5.h b/include/configs/librem5.h
index e17190ce9c..ce0a340ba2 100644
--- a/include/configs/librem5.h
+++ b/include/configs/librem5.h
@@ -15,12 +15,6 @@
#include <linux/sizes.h>
#include <asm/arch/imx-regs.h>
-#ifdef CONFIG_SPL_BUILD
-
-#define CONFIG_SPL_ABORT_ON_RAW_IMAGE /* For RAW image gives a error info not panic */
-
-#endif /* CONFIG_SPL_BUILD*/
-
#define CFG_SYS_FSL_USDHC_NUM 2
#define CONSOLE_ON_UART1
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 4b602ea030..be31f8a23c 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -11,7 +11,6 @@
#ifdef CONFIG_SPL_BUILD
/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
-#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
#define CFG_MALLOC_F_ADDR 0x182000
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-30 15:57:44 +0000