diff options
-rw-r--r-- | arch/powerpc/cpu/mpc85xx/start.S | 2 | ||||
-rw-r--r-- | board/siemens/iot2050/board.c | 11 | ||||
-rw-r--r-- | board/socionext/developerbox/developerbox.c | 23 | ||||
-rw-r--r-- | configs/qemu-ppce500_defconfig | 1 | ||||
-rw-r--r-- | configs/qemu-riscv32_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-riscv32_smode_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-riscv32_spl_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-riscv64_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-riscv64_smode_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-riscv64_spl_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu-x86_64_defconfig | 1 | ||||
-rw-r--r-- | configs/qemu-x86_defconfig | 1 | ||||
-rw-r--r-- | configs/qemu_arm64_defconfig | 2 | ||||
-rw-r--r-- | configs/qemu_arm_defconfig | 2 | ||||
-rw-r--r-- | configs/verdin-imx8mp_defconfig | 16 | ||||
-rw-r--r-- | drivers/misc/k3_avs.c | 104 | ||||
-rw-r--r-- | drivers/misc/vexpress_config.c | 5 | ||||
-rw-r--r-- | include/configs/iot2050.h | 9 | ||||
-rw-r--r-- | include/configs/vexpress_aemv8.h | 7 |
19 files changed, 145 insertions, 51 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S index e9c3042773..b737d5d12f 100644 --- a/arch/powerpc/cpu/mpc85xx/start.S +++ b/arch/powerpc/cpu/mpc85xx/start.S @@ -1617,7 +1617,7 @@ relocate_code: mr r10,r5 /* Save copy of Destination Address */ GET_GOT -#ifndef CONFIG_SPL_SKIP_RELOCATE +#if !defined(CONFIG_SPL_SKIP_RELOCATE) || !defined(CONFIG_SPL_BUILD) mr r3,r5 /* Destination Address */ lis r4,CONFIG_VAL(SYS_MONITOR_BASE)@h /* Source Address */ ori r4,r4,CONFIG_VAL(SYS_MONITOR_BASE)@l diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c index e35e55fb5d..0b0686e262 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -155,19 +155,20 @@ static bool board_is_advanced(void) strstr((char *)info->name, "IOT2050-ADVANCED") != NULL; } -static bool board_is_sr1(void) +static bool board_is_pg1(void) { struct iot2050_info *info = IOT2050_INFO_DATA; return info->magic == IOT2050_INFO_MAGIC && - strstr((char *)info->name, "-PG2") == NULL; + (strcmp((char *)info->name, "IOT2050-BASIC") == 0 || + strcmp((char *)info->name, "IOT2050-ADVANCED") == 0); } static bool board_is_m2(void) { struct iot2050_info *info = IOT2050_INFO_DATA; - return !board_is_sr1() && info->magic == IOT2050_INFO_MAGIC && + return info->magic == IOT2050_INFO_MAGIC && strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; } @@ -217,14 +218,14 @@ void set_board_info_env(void) } if (board_is_advanced()) { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; else if(board_is_m2()) fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; else fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; } else { - if (board_is_sr1()) + if (board_is_pg1()) fdtfile = "ti/k3-am6528-iot2050-basic.dtb"; else fdtfile = "ti/k3-am6528-iot2050-basic-pg2.dtb"; diff --git a/board/socionext/developerbox/developerbox.c b/board/socionext/developerbox/developerbox.c index 9585944d80..ac4415ff3b 100644 --- a/board/socionext/developerbox/developerbox.c +++ b/board/socionext/developerbox/developerbox.c @@ -20,39 +20,18 @@ #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) struct efi_fw_image fw_images[] = { -#if CONFIG_IS_ENABLED(FWU_MULTI_BANK_UPDATE) { .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, .fw_name = u"DEVELOPERBOX-FIP", .image_index = 1, }, -#else - { - .image_type_id = DEVELOPERBOX_UBOOT_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-UBOOT", - .image_index = 1, - }, - { - .image_type_id = DEVELOPERBOX_FIP_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-FIP", - .image_index = 2, - }, - { - .image_type_id = DEVELOPERBOX_OPTEE_IMAGE_GUID, - .fw_name = u"DEVELOPERBOX-OPTEE", - .image_index = 3, - }, -#endif }; struct efi_capsule_update_info update_info = { - .dfu_string = "mtd nor1=u-boot.bin raw 200000 100000;" - "fip.bin raw 180000 78000;" - "optee.bin raw 500000 100000", + .dfu_string = "mtd nor1=fip.bin raw 600000 400000", .num_images = ARRAY_SIZE(fw_images), .images = fw_images, }; - #endif /* EFI_HAVE_CAPSULE_SUPPORT */ static struct mm_region sc2a11_mem_map[] = { diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index fbe84d5702..de7267e228 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -21,7 +21,6 @@ CONFIG_BOOTCOMMAND="test -n \"$qemu_kernel_addr\" && bootm $qemu_kernel_addr - $ # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_LAST_STAGE_INIT=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PBSIZE=276 CONFIG_CMD_REGINFO=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_GREPENV=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 9ace68e73f..cf74a48ea2 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 0c7389e2f9..aeef2f35b0 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -13,8 +13,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index e63d6fd934..db9c971c2f 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -19,8 +19,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 9a8bbef192..9fb40b22f9 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -12,8 +12,6 @@ CONFIG_FIT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 1d0f021ade..e3b123ca4d 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -15,8 +15,6 @@ CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr}; fdt addr ${fdtcontroladdr};" CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index b048bb8aed..d6bf3130fe 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -18,8 +18,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x84000000 CONFIG_SPL_SYS_MALLOC=y -CONFIG_SYS_CBSIZE=256 -CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x4000000 # CONFIG_CMD_MII is not set CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index f02e9125a6..2ff49fbd6a 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -46,7 +46,6 @@ CONFIG_SPL_NET=y CONFIG_SPL_PCI=y CONFIG_SPL_PCH=y CONFIG_SPL_RTC=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 4b2787d4aa..246ac6b6b8 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -24,7 +24,6 @@ CONFIG_LOG=y CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_PCI_INIT_R=y -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_CPU=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index 5fdf496a45..c010c25a92 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -27,8 +27,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index 1347b86f34..9cc1f5f7c4 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -28,8 +28,6 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y -CONFIG_SYS_CBSIZE=512 -CONFIG_SYS_PBSIZE=532 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index bb20a2227f..eec1d964b9 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -79,6 +79,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_READ=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y @@ -108,6 +109,12 @@ CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_COMPOSITE_CCF=y CONFIG_CLK_IMX8MP=y CONFIG_FSL_CAAM=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 +CONFIG_FASTBOOT_BUF_SIZE=0x40000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_UUU_SUPPORT=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_MXC_GPIO=y @@ -138,6 +145,7 @@ CONFIG_DWC_ETH_QOS_IMX=y CONFIG_FEC_MXC=y CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PHY=y CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y @@ -160,14 +168,20 @@ CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_TMU=y CONFIG_USB=y +# CONFIG_SPL_DM_USB is not set +CONFIG_DM_USB_GADGET=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y CONFIG_USB_EHCI_HCD=y -CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_EHCI_MX7 is not set CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_KEYBOARD=y CONFIG_USB_HOST_ETHER=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Toradex" +CONFIG_USB_GADGET_VENDOR_NUM=0x1b67 +CONFIG_USB_GADGET_PRODUCT_NUM=0x4000 CONFIG_IMX_WATCHDOG=y CONFIG_HEXDUMP=y diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c index acfc731845..9a088244dd 100644 --- a/drivers/misc/k3_avs.c +++ b/drivers/misc/k3_avs.c @@ -15,6 +15,7 @@ #include <k3-avs.h> #include <dm/device_compat.h> #include <linux/bitops.h> +#include <linux/delay.h> #include <power/regulator.h> #define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i)) @@ -25,11 +26,28 @@ #define AM6_VTM_OPP_SHIFT(opp) (8 * (opp)) #define AM6_VTM_OPP_MASK 0xff +#define K3_VTM_DEVINFO_PWR0_OFFSET 0x4 +#define K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK 0xf0 +#define K3_VTM_TMPSENS0_CTRL_OFFSET 0x300 +#define K3_VTM_TMPSENS_STAT_OFFSET 0x8 +#define K3_VTM_ANYMAXT_OUTRG_ALERT_EN 0x1 +#define K3_VTM_LOW_TEMP_OFFSET 0x10 +#define K3_VTM_MISC_CTRL2_OFFSET 0x10 +#define K3_VTM_MISC_CTRL1_OFFSET 0xc +#define K3_VTM_TMPSENS_CTRL1_SOC BIT(5) +#define K3_VTM_TMPSENS_CTRL_CLRZ BIT(6) +#define K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN BIT(11) +#define K3_VTM_ADC_COUNT_FOR_123C 0x2f8 +#define K3_VTM_ADC_COUNT_FOR_105C 0x288 +#define K3_VTM_ADC_WA_VALUE 0x2c +#define K3_VTM_FUSE_MASK 0xc0000000 + #define VD_FLAG_INIT_DONE BIT(0) struct k3_avs_privdata { void *base; struct vd_config *vd_config; + struct udevice *dev; }; struct opp { @@ -237,6 +255,88 @@ static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv) return 0; } +/* k3_avs_program_tshut : Program thermal shutdown value for SOC + * set the values corresponding to thresholds to ~123C and 105C + * This is optional feature, Few times OS driver takes care of + * tshut programing. + */ + +static void k3_avs_program_tshut(struct k3_avs_privdata *priv) +{ + int cnt, id, val; + int workaround_needed = 0; + u32 ctrl_offset; + void __iomem *cfg2_base; + void __iomem *fuse_base; + + cfg2_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 1); + if (IS_ERR(cfg2_base)) { + dev_err(priv->dev, "cfg base is not defined\n"); + return; + } + + /* + * Some of TI's J721E SoCs require a software trimming procedure + * for the temperature monitors to function properly. To determine + * if this particular SoC is NOT affected, both bits in the + * WKUP_SPARE_FUSE0[31:30] will be set (0xC0000000) indicating + * when software trimming should NOT be applied. + * + * https://www.ti.com/lit/er/sprz455c/sprz455c.pdf + * This routine checks if workaround_needed to be applied or not + * based upon workaround_needed, adjust fixed value of tshut high and low + */ + + if (device_is_compatible(priv->dev, "ti,j721e-vtm")) { + fuse_base = (void __iomem *)devfdt_get_addr_index(priv->dev, 2); + if (IS_ERR(fuse_base)) { + dev_err(priv->dev, "fuse-base is not defined for J721E Soc\n"); + return; + } + + if (!((readl(fuse_base) & K3_VTM_FUSE_MASK) == K3_VTM_FUSE_MASK)) + workaround_needed = 1; + } + + dev_dbg(priv->dev, "Work around %sneeded\n", workaround_needed ? "" : "not "); + + /* Get the sensor count in the VTM */ + val = readl(priv->base + K3_VTM_DEVINFO_PWR0_OFFSET); + cnt = val & K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK; + cnt >>= __ffs(K3_VTM_DEVINFO_PWR0_TEMPSENS_CT_MASK); + + /* Program the thermal sensors */ + for (id = 0; id < cnt; id++) { + ctrl_offset = K3_VTM_TMPSENS0_CTRL_OFFSET + id * 0x20; + + val = readl(cfg2_base + ctrl_offset); + val |= (K3_VTM_TMPSENS_CTRL_MAXT_OUTRG_EN | + K3_VTM_TMPSENS_CTRL1_SOC | + K3_VTM_TMPSENS_CTRL_CLRZ | BIT(4)); + writel(val, cfg2_base + ctrl_offset); + } + + /* + * Program TSHUT thresholds + * Step 1: set the thresholds to ~123C and 105C WKUP_VTM_MISC_CTRL2 + * Step 2: WKUP_VTM_TMPSENS_CTRL_j set the MAXT_OUTRG_EN bit + * This is already taken care as per of init + * Step 3: WKUP_VTM_MISC_CTRL set the ANYMAXT_OUTRG_ALERT_EN bit + */ + + /* Low thresholds for tshut*/ + val = (K3_VTM_ADC_COUNT_FOR_105C - workaround_needed * K3_VTM_ADC_WA_VALUE) + << K3_VTM_LOW_TEMP_OFFSET; + /* high thresholds */ + val |= K3_VTM_ADC_COUNT_FOR_123C - workaround_needed * K3_VTM_ADC_WA_VALUE; + + writel(val, cfg2_base + K3_VTM_MISC_CTRL2_OFFSET); + /* ramp-up delay from Linux code */ + mdelay(100); + val = readl(cfg2_base + K3_VTM_MISC_CTRL1_OFFSET) | K3_VTM_ANYMAXT_OUTRG_ALERT_EN; + writel(val, cfg2_base + K3_VTM_MISC_CTRL1_OFFSET); +} + /** * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data * @@ -255,6 +355,7 @@ static int k3_avs_probe(struct udevice *dev) int ret; priv = dev_get_priv(dev); + priv->dev = dev; k3_avs_priv = priv; @@ -294,6 +395,9 @@ static int k3_avs_probe(struct udevice *dev) k3_avs_program_voltage(priv, vd, vd->opp); } + if (!device_is_compatible(priv->dev, "ti,am654-avs")) + k3_avs_program_tshut(priv); + return 0; } diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c index 2baca48109..99aad1412a 100644 --- a/drivers/misc/vexpress_config.c +++ b/drivers/misc/vexpress_config.c @@ -92,7 +92,7 @@ static struct misc_ops vexpress_config_ops = { static int vexpress_config_probe(struct udevice *dev) { struct ofnode_phandle_args args; - struct vexpress_config_sysreg *priv; + struct vexpress_config_sysreg *priv = dev_get_priv(dev); const char *prop; int err, prop_size; @@ -105,11 +105,9 @@ static int vexpress_config_probe(struct udevice *dev) if (!prop || (strncmp(prop, "arm,vexpress-sysreg", 19) != 0)) return -ENOENT; - priv = calloc(1, sizeof(*priv)); if (!priv) return -ENOMEM; - dev_get_uclass_priv(dev) = priv; priv->addr = ofnode_get_addr(args.node); return dev_read_u32(dev, "arm,vexpress,site", &priv->site); @@ -127,4 +125,5 @@ U_BOOT_DRIVER(vexpress_config_drv) = { .bind = dm_scan_fdt_dev, .probe = vexpress_config_probe, .ops = &vexpress_config_ops, + .priv_auto = sizeof(struct vexpress_config_sysreg), }; diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h index 4968722d18..94a9c76788 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,6 +15,15 @@ #include <configs/ti_armv7_common.h> +/* allow up to 3 USB storage devices */ +#ifdef CONFIG_CMD_USB +#undef BOOT_TARGET_USB +#define BOOT_TARGET_USB(func) \ + func(USB, usb, 0) \ + func(USB, usb, 1) \ + func(USB, usb, 2) +#endif + /* * This defines all MMC devices, even if the basic variant has no mmc1. * The non-supported device will be removed from the boot targets during diff --git a/include/configs/vexpress_aemv8.h b/include/configs/vexpress_aemv8.h index 43f7e454d8..24d8ca0866 100644 --- a/include/configs/vexpress_aemv8.h +++ b/include/configs/vexpress_aemv8.h @@ -148,6 +148,12 @@ #define FUNC_VIRTIO(func) #endif +#ifdef CONFIG_CMD_MMC +#define FUNC_MMC(func) func(MMC, mmc, 0) +#else +#define FUNC_MMC(func) +#endif + /* * Boot by loading an Android image, or kernel, initrd and FDT through * semihosting into DRAM. @@ -204,6 +210,7 @@ func(SMH, smh, na) \ func(MEM, mem, na) \ FUNC_VIRTIO(func) \ + FUNC_MMC(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) |