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-rw-r--r--arch/arm/dts/k3-am62-main.dtsi52
-rw-r--r--arch/arm/dts/k3-am62-mcu.dtsi24
-rw-r--r--arch/arm/dts/k3-am62-verdin-dev.dtsi50
-rw-r--r--arch/arm/dts/k3-am62-verdin.dtsi45
-rw-r--r--arch/arm/dts/k3-am62.dtsi8
-rw-r--r--arch/arm/dts/k3-am625-beagleplay.dts154
-rw-r--r--arch/arm/dts/k3-am625-sk.dts2
-rw-r--r--arch/arm/dts/k3-am64-main.dtsi48
-rw-r--r--arch/arm/dts/k3-am642-evm.dts4
-rw-r--r--arch/arm/dts/k3-am642-sk.dts8
-rw-r--r--arch/arm/dts/k3-j7200-common-proc-board.dts2
-rw-r--r--arch/arm/dts/k3-j721e-main.dtsi2
-rw-r--r--arch/arm/dts/k3-pinctrl.h12
-rw-r--r--arch/arm/dts/k3-serdes.h204
-rw-r--r--arch/arm/mach-omap2/am33xx/board.c6
-rw-r--r--board/ti/am62x/am62x.env2
-rw-r--r--drivers/misc/k3_avs.c2
-rw-r--r--include/dt-bindings/mux/ti-serdes.h70
-rw-r--r--tools/logos/ti_logo_414x97_32bpp.bmp (renamed from tools/logos/ti.bmp)bin160770 -> 160770 bytes
-rw-r--r--tools/logos/ti_logo_414x97_32bpp.bmp.gz (renamed from tools/logos/ti.gz)bin12285 -> 12285 bytes
20 files changed, 644 insertions, 51 deletions
diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 2488e3a537..284b90c94d 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -55,11 +55,29 @@
#phy-cells = <1>;
};
- epwm_tbclk: clock@4130 {
- compatible = "ti,am62-epwm-tbclk", "syscon";
+ epwm_tbclk: clock-controller@4130 {
+ compatible = "ti,am62-epwm-tbclk";
reg = <0x4130 0x4>;
#clock-cells = <1>;
};
+
+ audio_refclk0: clock-controller@82e0 {
+ compatible = "ti,am62-audio-refclk";
+ reg = <0x82e0 0x4>;
+ clocks = <&k3_clks 157 0>;
+ assigned-clocks = <&k3_clks 157 0>;
+ assigned-clock-parents = <&k3_clks 157 8>;
+ #clock-cells = <0>;
+ };
+
+ audio_refclk1: clock-controller@82e4 {
+ compatible = "ti,am62-audio-refclk";
+ reg = <0x82e4 0x4>;
+ clocks = <&k3_clks 157 10>;
+ assigned-clocks = <&k3_clks 157 10>;
+ assigned-clock-parents = <&k3_clks 157 18>;
+ #clock-cells = <0>;
+ };
};
dmss: bus@48000000 {
@@ -174,7 +192,6 @@
crypto: crypto@40900000 {
compatible = "ti,am62-sa3ul";
reg = <0x00 0x40900000 0x00 0x1200>;
- power-domains = <&k3_pds 70 TI_SCI_PD_SHARED>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
@@ -590,7 +607,7 @@
usb0: usb@31000000 {
compatible = "snps,dwc3";
- reg =<0x00 0x31000000 0x00 0x50000>;
+ reg = <0x00 0x31000000 0x00 0x50000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
@@ -613,7 +630,7 @@
usb1: usb@31100000 {
compatible = "snps,dwc3";
- reg =<0x00 0x31100000 0x00 0x50000>;
+ reg = <0x00 0x31100000 0x00 0x50000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
@@ -718,6 +735,31 @@
};
};
+ dss: dss@30200000 {
+ compatible = "ti,am625-dss";
+ reg = <0x00 0x30200000 0x00 0x1000>, /* common */
+ <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
+ <0x00 0x30206000 0x00 0x1000>, /* vid */
+ <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
+ <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
+ <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
+ <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
+ reg-names = "common", "vidl1", "vid",
+ "ovr1", "ovr2", "vp1", "vp2";
+ power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 186 6>,
+ <&dss_vp1_clk>,
+ <&k3_clks 186 2>;
+ clock-names = "fck", "vp1", "vp2";
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
+
+ dss_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
hwspinlock: spinlock@2a000000 {
compatible = "ti,am64-hwspinlock";
reg = <0x00 0x2a000000 0x00 0x1000>;
diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
index 19fc38157d..80a3e1db26 100644
--- a/arch/arm/dts/k3-am62-mcu.dtsi
+++ b/arch/arm/dts/k3-am62-mcu.dtsi
@@ -147,4 +147,28 @@
/* Tightly coupled to M4F */
status = "reserved";
};
+
+ mcu_mcan0: can@4e08000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e08000 0x00 0x200>,
+ <0x00 0x4e00000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
+
+ mcu_mcan1: can@4e18000 {
+ compatible = "bosch,m_can";
+ reg = <0x00 0x4e18000 0x00 0x200>,
+ <0x00 0x4e10000 0x00 0x8000>;
+ reg-names = "m_can", "message_ram";
+ power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
+ clock-names = "hclk", "cclk";
+ bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
+ status = "disabled";
+ };
};
diff --git a/arch/arm/dts/k3-am62-verdin-dev.dtsi b/arch/arm/dts/k3-am62-verdin-dev.dtsi
index 846caee7df..6701cb8974 100644
--- a/arch/arm/dts/k3-am62-verdin-dev.dtsi
+++ b/arch/arm/dts/k3-am62-verdin-dev.dtsi
@@ -8,6 +8,42 @@
* https://www.toradex.com/products/carrier-board/verdin-development-board-kit
*/
+/ {
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,bitclock-master = <&codec_dai>;
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&codec_dai>;
+ simple-audio-card,name = "verdin-nau8822";
+ simple-audio-card,routing =
+ "Headphones", "LHP",
+ "Headphones", "RHP",
+ "Speaker", "LSPK",
+ "Speaker", "RSPK",
+ "Line Out", "AUXOUT1",
+ "Line Out", "AUXOUT2",
+ "LAUX", "Line In",
+ "RAUX", "Line In",
+ "LMICP", "Mic In",
+ "RMICP", "Mic In";
+ simple-audio-card,widgets =
+ "Headphones", "Headphones",
+ "Line Out", "Line Out",
+ "Speaker", "Speaker",
+ "Microphone", "Mic In",
+ "Line", "Line In";
+
+ codec_dai: simple-audio-card,codec {
+ clocks = <&audio_refclk1>;
+ sound-dai = <&nau8822_1a>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&mcasp0>;
+ };
+ };
+};
+
/* Verdin ETHs */
&cpsw3g {
pinctrl-names = "default";
@@ -65,6 +101,15 @@
&main_i2c1 {
status = "okay";
+ /* Audio Codec */
+ nau8822_1a: audio-codec@1a {
+ compatible = "nuvoton,nau8822";
+ reg = <0x1a>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2s1_mclk>;
+ #sound-dai-cells = <0>;
+ };
+
/* IO Expander */
gpio_expander_21: gpio@21 {
compatible = "nxp,pcal6416";
@@ -144,6 +189,11 @@
status = "okay";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ status = "okay";
+};
+
/* Verdin UART_4 */
&mcu_uart0 {
status = "okay";
diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi
index 57dd061911..40992e7e4c 100644
--- a/arch/arm/dts/k3-am62-verdin.dtsi
+++ b/arch/arm/dts/k3-am62-verdin.dtsi
@@ -19,6 +19,8 @@
};
aliases {
+ can0 = &main_mcan0;
+ can1 = &mcu_mcan0;
ethernet0 = &cpsw_port1;
ethernet1 = &cpsw_port2;
i2c0 = &main_i2c0;
@@ -732,6 +734,14 @@
>;
};
+ /* Verdin CAN_2 */
+ pinctrl_mcu_mcan0: mcu-mcan0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_MCU_IOPAD(0x0038, PIN_INPUT, 0) /* (B3) MCU_MCAN0_RX */ /* SODIMM 26 */
+ AM62X_MCU_IOPAD(0x0034, PIN_OUTPUT, 0) /* (D6) MCU_MCAN0_TX */ /* SODIMM 24 */
+ >;
+ };
+
/* Verdin UART_4 - Reserved to Cortex-M4 */
pinctrl_mcu_uart0: mcu-uart0-default-pins {
pinctrl-single,pins = <
@@ -758,6 +768,11 @@
};
};
+/* VERDIN I2S_1_MCLK */
+&audio_refclk1 {
+ assigned-clock-rates = <25000000>;
+};
+
&cpsw3g {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1>;
@@ -800,6 +815,26 @@
};
};
+&dss {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_parallel_rgb>;
+ status = "disabled";
+};
+
+&dss_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* VP2: DPI Output */
+ port@1 {
+ reg = <1>;
+
+ dpi_out: endpoint {
+ remote-endpoint = <&rgb_in>;
+ };
+ };
+};
+
/* Verdin PWM_1, PWM_2 */
&epwm0 {
pinctrl-names = "default";
@@ -1036,6 +1071,7 @@
rgb_in: endpoint {
data-lines = <18>;
+ remote-endpoint = <&dpi_out>;
};
};
@@ -1238,8 +1274,6 @@
status = "disabled";
};
-/* Verdin CAN_2 - Reserved to Cortex-M4 */
-
/* Verdin SPI_1 */
&main_spi1 {
pinctrl-names = "default";
@@ -1333,6 +1367,13 @@
"";
};
+/* Verdin CAN_2 */
+&mcu_mcan0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mcu_mcan0>;
+ status = "disabled";
+};
+
/* Verdin UART_4 - Cortex-M4 UART */
&mcu_uart0 {
pinctrl-names = "default";
diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi
index 5e72c445f3..11f14eef2d 100644
--- a/arch/arm/dts/k3-am62.dtsi
+++ b/arch/arm/dts/k3-am62.dtsi
@@ -102,6 +102,14 @@
};
};
+ dss_vp1_clk: clock-divider-oldi {
+ compatible = "fixed-factor-clock";
+ clocks = <&k3_clks 186 0>;
+ #clock-cells = <0>;
+ clock-div = <7>;
+ clock-mult = <1>;
+ };
+
#include "k3-am62-thermal.dtsi"
};
diff --git a/arch/arm/dts/k3-am625-beagleplay.dts b/arch/arm/dts/k3-am625-beagleplay.dts
index 589bf998bc..7cfdf562b5 100644
--- a/arch/arm/dts/k3-am625-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-beagleplay.dts
@@ -14,7 +14,7 @@
#include "k3-am625.dtsi"
/ {
- compatible = "beagle,am625-beagleplay", "ti,am625";
+ compatible = "beagle,am625-beagleplay", "ti,am625";
model = "BeagleBoard.org BeaglePlay";
aliases {
@@ -192,6 +192,34 @@
};
+ hdmi0: connector-hdmi {
+ compatible = "hdmi-connector";
+ label = "hdmi";
+ type = "a";
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <&it66121_out>;
+ };
+ };
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "it66121 HDMI";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&hdmi_dailink_master>;
+ simple-audio-card,frame-master = <&hdmi_dailink_master>;
+
+ hdmi_dailink_master: simple-audio-card,cpu {
+ sound-dai = <&mcasp1>;
+ system-clock-direction-out;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&it66121>;
+ };
+ };
+
/* Workaround for errata i2329 - just use mdio bitbang */
mdio0: mdio {
compatible = "virtual,mdio-gpio";
@@ -422,6 +450,57 @@
AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (D16) EXTINTn */
>;
};
+
+ hdmi_gpio_pins_default: hdmi-gpio-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0094, PIN_INPUT_PULLUP | PIN_DEBOUNCE_CONF6, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */
+ AM62X_IOPAD(0x0054, PIN_OUTPUT_PULLUP, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
+ >;
+ };
+
+ mcasp_hdmi_pins_default: mcasp-hdmi-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0n_CLE.MCASP1_ACLKX */
+ AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */
+ AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEn.MCASP1_AXR0 */
+ AM62X_IOPAD(0x0088, PIN_INPUT, 2) /* (L24) GPMC0_OEn_REn.MCASP1_AXR1 */
+ AM62X_IOPAD(0x0084, PIN_INPUT, 2) /* (L23) GPMC0_ADVn_ALE.MCASP1_AXR2 */
+ AM62X_IOPAD(0x007c, PIN_INPUT, 2) /* (P25) GPMC0_CLK.MCASP1_AXR3 */
+ >;
+ };
+
+ dss0_pins_default: dss0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
+ AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
+ AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
+ AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
+ AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
+ AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
+ AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
+ AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
+ AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
+ AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
+ AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
+ AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
+ AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
+ AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
+ AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
+ AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
+ AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
+ AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
+ AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
+ AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
+ AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
+ AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
+ AM62X_IOPAD(0x0064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
+ AM62X_IOPAD(0x0068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
+ AM62X_IOPAD(0x006c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
+ AM62X_IOPAD(0x0070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
+ AM62X_IOPAD(0x0074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
+ AM62X_IOPAD(0x0078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
+ >;
+ };
};
&mcu_pmx0 {
@@ -432,7 +511,7 @@
>;
};
- gbe_pmx_obsclk: gbe-pmx-clk-default {
+ gbe_pmx_obsclk: gbe-pmx-obsclk-default-pins {
pinctrl-single,pins = <
AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT, 1) /* (B8) MCU_SPI0_CS1.MCU_OBSCLK0 */
>;
@@ -670,6 +749,42 @@
pinctrl-0 = <&i2c2_1v8_pins_default>;
clock-frequency = <100000>;
status = "okay";
+
+ it66121: bridge-hdmi@4c {
+ compatible = "ite,it66121";
+ reg = <0x4c>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hdmi_gpio_pins_default>;
+ vcn33-supply = <&vdd_3v3>;
+ vcn18-supply = <&buck2_reg>;
+ vrf12-supply = <&buck3_reg>;
+ reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_LOW>;
+ interrupt-parent = <&main_gpio0>;
+ interrupts = <36 IRQ_TYPE_EDGE_FALLING>;
+ #sound-dai-cells = <0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ it66121_in: endpoint {
+ bus-width = <24>;
+ remote-endpoint = <&dpi1_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ it66121_out: endpoint {
+ remote-endpoint = <&hdmi_connector_in>;
+ };
+ };
+ };
+ };
};
&main_i2c3 {
@@ -756,3 +871,38 @@
pinctrl-0 = <&wifi_debug_uart_pins_default>;
status = "okay";
};
+
+&dss {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dss0_pins_default>;
+};
+
+&dss_ports {
+ /* VP2: DPI Output */
+ port@1 {
+ reg = <1>;
+
+ dpi1_out: endpoint {
+ remote-endpoint = <&it66121_in>;
+ };
+ };
+};
+
+&mcasp1 {
+ status = "okay";
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp_hdmi_pins_default>;
+ auxclk-fs-ratio = <2177>;
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 1 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
index 3f9ef4053a..7c98c1b855 100644
--- a/arch/arm/dts/k3-am625-sk.dts
+++ b/arch/arm/dts/k3-am625-sk.dts
@@ -212,7 +212,7 @@
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
- flash@0{
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <8>;
diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 1664d9f024..0df54a7418 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -44,11 +44,28 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x43000000 0x20000>;
+ chipid@14 {
+ compatible = "ti,am654-chipid";
+ reg = <0x00000014 0x4>;
+ };
+
serdes_ln_ctrl: mux-controller {
compatible = "mmio-mux";
#mux-control-cells = <1>;
mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
};
+
+ phy_gmii_sel: phy@4044 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4044 0x8>;
+ #phy-cells = <1>;
+ };
+
+ epwm_tbclk: clock-controller@4140 {
+ compatible = "ti,am64-epwm-tbclk";
+ reg = <0x4130 0x4>;
+ #clock-cells = <1>;
+ };
};
gic500: interrupt-controller@1800000 {
@@ -203,31 +220,6 @@
pinctrl-single,function-mask = <0xffffffff>;
};
- main_conf: syscon@43000000 {
- compatible = "syscon", "simple-mfd";
- reg = <0x00 0x43000000 0x00 0x20000>;
- #address-cells = <1>;
- #size-cells = <1>;
- ranges = <0x00 0x00 0x43000000 0x20000>;
-
- chipid@14 {
- compatible = "ti,am654-chipid";
- reg = <0x00000014 0x4>;
- };
-
- phy_gmii_sel: phy@4044 {
- compatible = "ti,am654-phy-gmii-sel";
- reg = <0x4044 0x8>;
- #phy-cells = <1>;
- };
-
- epwm_tbclk: clock@4140 {
- compatible = "ti,am64-epwm-tbclk", "syscon";
- reg = <0x4130 0x4>;
- #clock-cells = <1>;
- };
- };
-
main_timer0: timer@2400000 {
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
@@ -733,7 +725,7 @@
pinctrl-single,function-mask = <0x000107ff>;
};
- usbss0: cdns-usb@f900000{
+ usbss0: cdns-usb@f900000 {
compatible = "ti,am64-usb";
reg = <0x00 0xf900000 0x00 0x100>;
power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
@@ -744,7 +736,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
- usb0: usb@f400000{
+ usb0: usb@f400000 {
compatible = "cdns,usb3";
reg = <0x00 0xf400000 0x00 0x10000>,
<0x00 0xf410000 0x00 0x10000>,
@@ -773,6 +765,7 @@
assigned-clock-parents = <&k3_clks 0 3>;
assigned-clock-rates = <60000000>;
clock-names = "fck";
+ status = "disabled";
adc {
#io-channel-cells = <1>;
@@ -802,6 +795,7 @@
assigned-clock-parents = <&k3_clks 75 7>;
assigned-clock-rates = <166666666>;
power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
};
diff --git a/arch/arm/dts/k3-am642-evm.dts b/arch/arm/dts/k3-am642-evm.dts
index 15c282c934..b4a1f73d4f 100644
--- a/arch/arm/dts/k3-am642-evm.dts
+++ b/arch/arm/dts/k3-am642-evm.dts
@@ -6,12 +6,13 @@
/dts-v1/;
#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am642.dtsi"
+#include "k3-serdes.h"
+
/ {
compatible = "ti,am642-evm", "ti,am642";
model = "Texas Instruments AM642 EVM";
@@ -519,6 +520,7 @@
};
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
diff --git a/arch/arm/dts/k3-am642-sk.dts b/arch/arm/dts/k3-am642-sk.dts
index cbce43dbe3..722fd285a3 100644
--- a/arch/arm/dts/k3-am642-sk.dts
+++ b/arch/arm/dts/k3-am642-sk.dts
@@ -5,13 +5,14 @@
/dts-v1/;
-#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/leds/common.h>
#include "k3-am642.dtsi"
+#include "k3-serdes.h"
+
/ {
compatible = "ti,am642-sk", "ti,am642";
model = "Texas Instruments AM642 SK";
@@ -512,11 +513,8 @@
};
};
-&tscadc0 {
- status = "disabled";
-};
-
&ospi0 {
+ status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ospi0_pins_default>;
diff --git a/arch/arm/dts/k3-j7200-common-proc-board.dts b/arch/arm/dts/k3-j7200-common-proc-board.dts
index d14f3c18b6..ef5e807a80 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-common-proc-board.dts
@@ -8,8 +8,8 @@
#include "k3-j7200-som-p0.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/net/ti-dp83867.h>
-#include <dt-bindings/mux/ti-serdes.h>
#include <dt-bindings/phy/phy.h>
+#include "k3-serdes.h"
/ {
chosen {
diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index cf3482376c..d2edf5df2e 100644
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -6,7 +6,7 @@
*/
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/mux/mux.h>
-#include <dt-bindings/mux/ti-serdes.h>
+#include "k3-serdes.h"
/ {
cmn_refclk: clock-cmnrefclk {
diff --git a/arch/arm/dts/k3-pinctrl.h b/arch/arm/dts/k3-pinctrl.h
index c97548a3f4..2a4e0e084d 100644
--- a/arch/arm/dts/k3-pinctrl.h
+++ b/arch/arm/dts/k3-pinctrl.h
@@ -11,6 +11,7 @@
#define PULLUDEN_SHIFT (16)
#define PULLTYPESEL_SHIFT (17)
#define RXACTIVE_SHIFT (18)
+#define DEBOUNCE_SHIFT (11)
#define PULL_DISABLE (1 << PULLUDEN_SHIFT)
#define PULL_ENABLE (0 << PULLUDEN_SHIFT)
@@ -29,9 +30,20 @@
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
#define PIN_INPUT_PULLDOWN (INPUT_EN | PULL_DOWN)
+#define PIN_DEBOUNCE_DISABLE (0 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF1 (1 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF2 (2 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF3 (3 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF4 (4 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT)
+#define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT)
+
#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
+#define AM62PX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
+#define AM62PX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
+
#define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
#define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode))
diff --git a/arch/arm/dts/k3-serdes.h b/arch/arm/dts/k3-serdes.h
new file mode 100644
index 0000000000..29167f85c1
--- /dev/null
+++ b/arch/arm/dts/k3-serdes.h
@@ -0,0 +1,204 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for SERDES MUX for TI SoCs
+ *
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#ifndef DTS_ARM64_TI_K3_SERDES_H
+#define DTS_ARM64_TI_K3_SERDES_H
+
+/* J721E */
+
+#define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0
+#define J721E_SERDES0_LANE0_PCIE0_LANE0 0x1
+#define J721E_SERDES0_LANE0_USB3_0_SWAP 0x2
+#define J721E_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J721E_SERDES0_LANE1_QSGMII_LANE2 0x0
+#define J721E_SERDES0_LANE1_PCIE0_LANE1 0x1
+#define J721E_SERDES0_LANE1_USB3_0 0x2
+#define J721E_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J721E_SERDES1_LANE0_QSGMII_LANE3 0x0
+#define J721E_SERDES1_LANE0_PCIE1_LANE0 0x1
+#define J721E_SERDES1_LANE0_USB3_1_SWAP 0x2
+#define J721E_SERDES1_LANE0_SGMII_LANE0 0x3
+
+#define J721E_SERDES1_LANE1_QSGMII_LANE4 0x0
+#define J721E_SERDES1_LANE1_PCIE1_LANE1 0x1
+#define J721E_SERDES1_LANE1_USB3_1 0x2
+#define J721E_SERDES1_LANE1_SGMII_LANE1 0x3
+
+#define J721E_SERDES2_LANE0_IP1_UNUSED 0x0
+#define J721E_SERDES2_LANE0_PCIE2_LANE0 0x1
+#define J721E_SERDES2_LANE0_USB3_1_SWAP 0x2
+#define J721E_SERDES2_LANE0_SGMII_LANE0 0x3
+
+#define J721E_SERDES2_LANE1_IP1_UNUSED 0x0
+#define J721E_SERDES2_LANE1_PCIE2_LANE1 0x1
+#define J721E_SERDES2_LANE1_USB3_1 0x2
+#define J721E_SERDES2_LANE1_SGMII_LANE1 0x3
+
+#define J721E_SERDES3_LANE0_IP1_UNUSED 0x0
+#define J721E_SERDES3_LANE0_PCIE3_LANE0 0x1
+#define J721E_SERDES3_LANE0_USB3_0_SWAP 0x2
+#define J721E_SERDES3_LANE0_IP4_UNUSED 0x3
+
+#define J721E_SERDES3_LANE1_IP1_UNUSED 0x0
+#define J721E_SERDES3_LANE1_PCIE3_LANE1 0x1
+#define J721E_SERDES3_LANE1_USB3_0 0x2
+#define J721E_SERDES3_LANE1_IP4_UNUSED 0x3
+
+#define J721E_SERDES4_LANE0_EDP_LANE0 0x0
+#define J721E_SERDES4_LANE0_IP2_UNUSED 0x1
+#define J721E_SERDES4_LANE0_QSGMII_LANE5 0x2
+#define J721E_SERDES4_LANE0_IP4_UNUSED 0x3
+
+#define J721E_SERDES4_LANE1_EDP_LANE1 0x0
+#define J721E_SERDES4_LANE1_IP2_UNUSED 0x1
+#define J721E_SERDES4_LANE1_QSGMII_LANE6 0x2
+#define J721E_SERDES4_LANE1_IP4_UNUSED 0x3
+
+#define J721E_SERDES4_LANE2_EDP_LANE2 0x0
+#define J721E_SERDES4_LANE2_IP2_UNUSED 0x1
+#define J721E_SERDES4_LANE2_QSGMII_LANE7 0x2
+#define J721E_SERDES4_LANE2_IP4_UNUSED 0x3
+
+#define J721E_SERDES4_LANE3_EDP_LANE3 0x0
+#define J721E_SERDES4_LANE3_IP2_UNUSED 0x1
+#define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2
+#define J721E_SERDES4_LANE3_IP4_UNUSED 0x3
+
+/* J7200 */
+
+#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0
+#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0
+#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0
+#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0
+#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J7200_SERDES0_LANE3_USB 0x2
+#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
+
+/* AM64 */
+
+#define AM64_SERDES0_LANE0_PCIE0 0x0
+#define AM64_SERDES0_LANE0_USB 0x1
+
+/* J721S2 */
+
+#define J721S2_SERDES0_LANE0_EDP_LANE0 0x0
+#define J721S2_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J721S2_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE1_EDP_LANE1 0x0
+#define J721S2_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J721S2_SERDES0_LANE1_USB 0x2
+#define J721S2_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE2_EDP_LANE2 0x0
+#define J721S2_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J721S2_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J721S2_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J721S2_SERDES0_LANE3_EDP_LANE3 0x0
+#define J721S2_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J721S2_SERDES0_LANE3_USB 0x2
+#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3
+
+/* J784S4 */
+
+#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0
+#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0
+#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0
+#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0
+#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J784S4_SERDES0_LANE3_USB 0x2
+#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0
+#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1
+#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0
+#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1
+#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0
+#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1
+#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2
+#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0
+#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1
+#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2
+#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0
+#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1
+#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0
+#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1
+#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0
+#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1
+#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0
+#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1
+#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE0_EDP_LANE0 0x0
+#define J784S4_SERDES4_LANE0_QSGMII_LANE5 0x1
+#define J784S4_SERDES4_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE1_EDP_LANE1 0x0
+#define J784S4_SERDES4_LANE1_QSGMII_LANE6 0x1
+#define J784S4_SERDES4_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE2_EDP_LANE2 0x0
+#define J784S4_SERDES4_LANE2_QSGMII_LANE7 0x1
+#define J784S4_SERDES4_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE3_EDP_LANE3 0x0
+#define J784S4_SERDES4_LANE3_QSGMII_LANE8 0x1
+#define J784S4_SERDES4_LANE3_USB 0x2
+#define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3
+
+#endif /* DTS_ARM64_TI_K3_SERDES_H */
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index a6307251c1..9d9b4d7f29 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -270,11 +270,7 @@ int arch_misc_init(void)
return ret;
#if defined(CONFIG_DM_ETH) && defined(CONFIG_USB_ETHER)
- ret = usb_ether_init();
- if (ret) {
- pr_err("USB ether init failed\n");
- return ret;
- }
+ usb_ether_init();
#endif
return 0;
diff --git a/board/ti/am62x/am62x.env b/board/ti/am62x/am62x.env
index 3b79ae1b3f..22a6c2c91b 100644
--- a/board/ti/am62x/am62x.env
+++ b/board/ti/am62x/am62x.env
@@ -15,7 +15,7 @@ bootpart=1:2
bootdir=/boot
rd_spec=-
-splashfile=ti.gz
+splashfile=ti_logo_414x97_32bpp.bmp.gz
splashimage=0x80200000
splashpos=m,m
splashsource=sf
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index 840148d090..acfc731845 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -382,6 +382,8 @@ static struct vd_config am654_vd_config = {
static const struct udevice_id k3_avs_ids[] = {
{ .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config },
{ .compatible = "ti,j721e-avs", .data = (ulong)&j721e_vd_config },
+ { .compatible = "ti,j721e-vtm", .data = (ulong)&j721e_vd_config },
+ { .compatible = "ti,j7200-vtm", .data = (ulong)&j721e_vd_config },
{}
};
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index d3116c52ab..b0b1091aad 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -6,6 +6,14 @@
#ifndef _DT_BINDINGS_MUX_TI_SERDES
#define _DT_BINDINGS_MUX_TI_SERDES
+/*
+ * These bindings are deprecated, because they do not match the actual
+ * concept of bindings but rather contain pure constants values used only
+ * in DTS board files.
+ * Instead include the header in the DTS source directory.
+ */
+#warning "These bindings are deprecated. Instead, use the header in the DTS source directory."
+
/* J721E */
#define J721E_SERDES0_LANE0_QSGMII_LANE1 0x0
@@ -117,4 +125,66 @@
#define J721S2_SERDES0_LANE3_USB 0x2
#define J721S2_SERDES0_LANE3_IP4_UNUSED 0x3
+/* J784S4 */
+
+#define J784S4_SERDES0_LANE0_IP1_UNUSED 0x0
+#define J784S4_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J784S4_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE1_IP1_UNUSED 0x0
+#define J784S4_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J784S4_SERDES0_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE2_PCIE3_LANE0 0x0
+#define J784S4_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J784S4_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES0_LANE3_PCIE3_LANE1 0x0
+#define J784S4_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J784S4_SERDES0_LANE3_USB 0x2
+#define J784S4_SERDES0_LANE3_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE0_QSGMII_LANE3 0x0
+#define J784S4_SERDES1_LANE0_PCIE0_LANE0 0x1
+#define J784S4_SERDES1_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES1_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE1_QSGMII_LANE4 0x0
+#define J784S4_SERDES1_LANE1_PCIE0_LANE1 0x1
+#define J784S4_SERDES1_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES1_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE2_QSGMII_LANE1 0x0
+#define J784S4_SERDES1_LANE2_PCIE0_LANE2 0x1
+#define J784S4_SERDES1_LANE2_PCIE2_LANE0 0x2
+#define J784S4_SERDES1_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES1_LANE3_QSGMII_LANE2 0x0
+#define J784S4_SERDES1_LANE3_PCIE0_LANE3 0x1
+#define J784S4_SERDES1_LANE3_PCIE2_LANE1 0x2
+#define J784S4_SERDES1_LANE3_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE0_QSGMII_LANE5 0x0
+#define J784S4_SERDES2_LANE0_IP2_UNUSED 0x1
+#define J784S4_SERDES2_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE1_QSGMII_LANE6 0x0
+#define J784S4_SERDES2_LANE1_IP2_UNUSED 0x1
+#define J784S4_SERDES2_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE2_QSGMII_LANE7 0x0
+#define J784S4_SERDES2_LANE2_QSGMII_LANE1 0x1
+#define J784S4_SERDES2_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES2_LANE3_QSGMII_LANE8 0x0
+#define J784S4_SERDES2_LANE3_QSGMII_LANE2 0x1
+#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2
+#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
diff --git a/tools/logos/ti.bmp b/tools/logos/ti_logo_414x97_32bpp.bmp
index 7fee6e81e0..7fee6e81e0 100644
--- a/tools/logos/ti.bmp
+++ b/tools/logos/ti_logo_414x97_32bpp.bmp
Binary files differ
diff --git a/tools/logos/ti.gz b/tools/logos/ti_logo_414x97_32bpp.bmp.gz
index 3a5b45e035..3a5b45e035 100644
--- a/tools/logos/ti.gz
+++ b/tools/logos/ti_logo_414x97_32bpp.bmp.gz
Binary files differ
generated by cgit v1.2.3 (git 2.39.1) at 2025-06-01 13:21:23 +0000