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| author | Michal Simek <michal.simek@amd.com> | 2023-11-01 12:22:14 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-11-07 13:47:09 +0100 |
| commit | 1332a781e1ae214ee01af49454c1622cc9433517 (patch) | |
| tree | fdb8f48bcead2cec440d64d7915b258ca833d3c1 /tools/u_boot_pylib/command.py | |
| parent | 7a64be2ba259d184745147ad5163a300475b0b53 (diff) | |
ARM: zynq: Add partition description
Xilinx is using standard mtd partition layout for quite a long time. It is
used for testing purpose on evaluation boards.
Also #address/size-cells shouldn't be present without nodes which should
use them that's why move them from zynq-7000.dtsi to nand/nor nodes
directly.
The patch was tested on zc706 and zedboard(with also increasing max
frequency and rx bus width).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
Diffstat (limited to 'tools/u_boot_pylib/command.py')
0 files changed, 0 insertions, 0 deletions