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authorLukas Funke <lukas.funke@weidmueller.com>2023-08-03 17:22:15 +0200
committerSimon Glass <sjg@chromium.org>2023-08-05 11:33:18 -0600
commit7fcfa9d930127377d5b3fb54256f468dcc288103 (patch)
treec61a42b163429a35ba52dfbb9ede059ec291154b /tools/binman/ftest.py
parent7f51fe5c6db21592f7f2a914b2dab3f67e765d8b (diff)
binman: etype: Add xilinx-bootgen etype
This adds a new etype 'xilinx-bootgen'. By using this etype it is possible to created an signed SPL (FSBL in Xilinx terms) for ZynqMP boards. The etype uses Xilinx Bootgen tools in order to transform the SPL into a bootable image and sign the image with a given primary and secondary public key. For more information to signing the FSBL please refer to the Xilinx Bootgen documentation. Here is an example of the etype in use: spl { filename = "boot.signed.bin"; xilinx-bootgen { pmufw-filename = "pmu-firmware.elf"; psk-key-name-hint = "psk0"; ssk-key-name-hint = "ssk0"; auth-params = "ppk_select=0", "spk_id=0x00000000"; u-boot-spl-nodtb { }; u-boot-spl-dtb { }; }; }; For this to work the hash of the primary public key has to be fused into the ZynqMP device and authentication (RSA_EN) has to be set. For testing purposes: if ppk hash check should be skipped one can add the property 'fsbl_config = "bh_auth_enable";' to the etype. However, this should only be used for testing(!). Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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