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authorSimon Glass <sjg@chromium.org>2021-02-04 21:22:09 -0700
committerTom Rini <trini@konsulko.com>2021-03-03 15:40:47 -0500
commit8a45b2205749252f61d26508d5de9dcce020b2ef (patch)
treefac56f635fb7a10236dd41868a0b1629184ab39c /test/dm/gpio.c
parentbe04f1ab4291c724a65d86a743b8b7938f15a54c (diff)
gpio: Add a way to read 3-way strapping pins
Using the internal vs. external pull resistors it is possible to get 27 different combinations from 3 strapping pins. Add an implementation of this. This involves updating the sandbox GPIO driver to model external and (weaker) internal pull resistors. The get_value() method now takes account of what is driving a pin: sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the value outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the external state and we work the final state using those flags and the internal GPIOD_PULL_UP/DOWN flags Of course the outside source does not really exist in sandbox. We are just modelling it for test purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'test/dm/gpio.c')
-rw-r--r--test/dm/gpio.c98
1 files changed, 98 insertions, 0 deletions
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index be5da95304..33ae98701f 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -680,3 +680,101 @@ static int dm_test_clrset_flags_invert(struct unit_test_state *uts)
return 0;
}
DM_TEST(dm_test_clrset_flags_invert, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+static int set_gpios(struct unit_test_state *uts, struct gpio_desc *desc,
+ int count, uint value)
+{
+ int i;
+
+ for (i = 0; i < count; i++) {
+ const uint mask = 1 << i;
+
+ ut_assertok(sandbox_gpio_set_value(desc[i].dev, desc[i].offset,
+ value & mask));
+ }
+
+ return 0;
+}
+
+/* Check that an active-low GPIO works as expected */
+static int dm_test_gpio_get_values_as_int(struct unit_test_state *uts)
+{
+ const int gpio_count = 3;
+ struct gpio_desc desc[gpio_count];
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 0, &dev));
+ ut_asserteq_str("a-test", dev->name);
+
+ ut_asserteq(3, gpio_request_list_by_name(dev, "test-gpios", desc,
+ gpio_count, GPIOD_IS_IN));
+ ut_assertok(set_gpios(uts, desc, gpio_count, 0));
+ ut_asserteq(0, dm_gpio_get_values_as_int(desc, gpio_count));
+
+ ut_assertok(set_gpios(uts, desc, gpio_count, 5));
+ ut_asserteq(5, dm_gpio_get_values_as_int(desc, gpio_count));
+
+ ut_assertok(set_gpios(uts, desc, gpio_count, 7));
+ ut_asserteq(7, dm_gpio_get_values_as_int(desc, gpio_count));
+
+ return 0;
+}
+DM_TEST(dm_test_gpio_get_values_as_int,
+ UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+
+/* Check that an active-low GPIO works as expected */
+static int dm_test_gpio_get_values_as_int_base3(struct unit_test_state *uts)
+{
+ const int gpio_count = 3;
+ struct gpio_desc desc[gpio_count];
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 0, &dev));
+ ut_asserteq_str("a-test", dev->name);
+
+ ut_asserteq(3, gpio_request_list_by_name(dev, "test-gpios", desc,
+ gpio_count, GPIOD_IS_IN));
+
+ /*
+ * First test the sandbox GPIO driver works as expected. The external
+ * pull resistor should be stronger than the internal one.
+ */
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset,
+ GPIOD_IS_IN | GPIOD_EXT_PULL_UP | GPIOD_PULL_UP);
+ ut_asserteq(1, dm_gpio_get_value(desc));
+
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset, GPIOD_IS_IN |
+ GPIOD_EXT_PULL_DOWN | GPIOD_PULL_UP);
+ ut_asserteq(0, dm_gpio_get_value(desc));
+
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset,
+ GPIOD_IS_IN | GPIOD_PULL_UP);
+ ut_asserteq(1, dm_gpio_get_value(desc));
+
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset, GPIOD_PULL_DOWN);
+ ut_asserteq(0, dm_gpio_get_value(desc));
+
+ /*
+ * Set up pins: pull-up (1), pull-down (0) and floating (2). This should
+ * result in digits 2 0 1, i.e. 2 * 9 + 1 * 3 = 19
+ */
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset, GPIOD_EXT_PULL_UP);
+ sandbox_gpio_set_flags(desc[1].dev, desc[1].offset,
+ GPIOD_EXT_PULL_DOWN);
+ sandbox_gpio_set_flags(desc[2].dev, desc[2].offset, 0);
+ ut_asserteq(19, dm_gpio_get_values_as_int_base3(desc, gpio_count));
+
+ /*
+ * Set up pins: floating (2), pull-up (1) and pull-down (0). This should
+ * result in digits 0 1 2, i.e. 1 * 3 + 2 = 5
+ */
+ sandbox_gpio_set_flags(desc[0].dev, desc[0].offset, 0);
+ sandbox_gpio_set_flags(desc[1].dev, desc[1].offset, GPIOD_EXT_PULL_UP);
+ sandbox_gpio_set_flags(desc[2].dev, desc[2].offset,
+ GPIOD_EXT_PULL_DOWN);
+ ut_asserteq(5, dm_gpio_get_values_as_int_base3(desc, gpio_count));
+
+ return 0;
+}
+DM_TEST(dm_test_gpio_get_values_as_int_base3,
+ UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);