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| author | Stefan Roese <sr@denx.de> | 2023-05-25 11:49:18 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@amd.com> | 2023-06-12 13:25:02 +0200 |
| commit | 2f5ad77cfead72b0e5156a7cc527b2f9eabde63e (patch) | |
| tree | 85c0fad3f99a04fdfb127abb73b836551a92c30f /net/dsa-uclass.c | |
| parent | a4444bf94b4d0d05fa25192b16b8366d10d0f261 (diff) | |
PCI: zynqmp: Add ZynqMP NWL PCIe root port driver
This patch adds the PCIe controller driver for the Xilinx / AMD ZynqMP
NWL PCIe Bridge as root port. The driver source is partly copied from
the Linux PCI driver and modified to enable usage in U-Boot (e.g.
simplified and interrupt support removed).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Pali Rohár <pali@kernel.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com>
Acked-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Link: https://lore.kernel.org/r/20230525094918.111949-1-sr@denx.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
Diffstat (limited to 'net/dsa-uclass.c')
0 files changed, 0 insertions, 0 deletions