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authorAndreas Dannenberg <dannenberg@ti.com>2023-06-14 17:28:53 -0500
committerTom Rini <trini@konsulko.com>2023-07-14 15:21:07 -0400
commitedacf6a44d2383f9137a99ffdf61a24de4a47307 (patch)
tree33d35b4d4a6ef894107c72f91b205b9cdf7f79aa /lib/zlib
parent10de1257079905ac383e7abf346a04221cafa620 (diff)
net: ti: am65-cpsw-nuss: Use dedicated port mode control registers
The different CPSW sub-system Ethernet ports have different PHY mode control registers. In order to allow the modes to get configured independently only the register for the port in question must be accessed, otherwise we would just be re-configuring the mode for port 1, while leaving all others at their power-on defaults. Fix this issue by adding a port-number based offset to the mode control base register address based on the fact that the control registers for the different ports are spaced exactly 0x4 bytes apart. Fixes: 9d0dca1199d1 ("net: ethernet: ti: Introduce am654 gigabit eth switch subsystem driver") Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
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