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authorTom Rini <trini@konsulko.com>2021-04-13 09:50:45 -0400
committerTom Rini <trini@konsulko.com>2021-04-13 09:50:45 -0400
commita94ab561e2f49a80d8579930e840b810ab1a1330 (patch)
tree77913e7bd9309afa6b2ddc6f3e3e49827da2025c /include
parent3b676a1662ac6b54d1e97ea40a0c41ee0925ffe3 (diff)
parent8c4e3b79bd0bb76eea16869e9666e19047c0d005 (diff)
Merge branch '2021-04-13-assorted-improvements'
- A large assortment of bug fixes, code cleanups and a few feature enhancements.
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/gpio.h11
-rw-r--r--include/configs/e2220-1170.h28
-rw-r--r--include/configs/warp.h1
-rw-r--r--include/dm/uclass-id.h1
-rw-r--r--include/hw_sha.h38
-rw-r--r--include/linux/string.h3
-rw-r--r--include/power/max77696_pmic.h59
-rw-r--r--include/qfw.h200
-rw-r--r--include/scmi_protocols.h113
-rw-r--r--include/tee/optee.h4
10 files changed, 319 insertions, 139 deletions
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 2cb0500aec..e33cde7abd 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -707,17 +707,6 @@ int dm_gpio_get_value(const struct gpio_desc *desc);
int dm_gpio_set_value(const struct gpio_desc *desc, int value);
/**
- * dm_gpio_set_dir() - Set the direction for a GPIO
- *
- * This sets up the direction according to the GPIO flags: desc->flags.
- *
- * @desc: GPIO description containing device, offset and flags,
- * previously returned by gpio_request_by_name()
- * @return 0 if OK, -ve on error
- */
-int dm_gpio_set_dir(struct gpio_desc *desc);
-
-/**
* dm_gpio_clrset_flags() - Update flags
*
* This updates the flags as directled. Note that desc->flags is updated by this
diff --git a/include/configs/e2220-1170.h b/include/configs/e2220-1170.h
deleted file mode 100644
index 5ed62678ce..0000000000
--- a/include/configs/e2220-1170.h
+++ /dev/null
@@ -1,28 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2013-2015
- * NVIDIA Corporation <www.nvidia.com>
- */
-
-#ifndef _E2220_1170_H
-#define _E2220_1170_H
-
-#include <linux/sizes.h>
-
-#include "tegra210-common.h"
-
-/* High-level configuration options */
-#define CONFIG_TEGRA_BOARD_STRING "NVIDIA E2220-1170"
-
-/* Board-specific serial config */
-#define CONFIG_TEGRA_ENABLE_UARTA
-
-/* Environment in eMMC, at the end of 2nd "boot sector" */
-
-/* SPI */
-#define CONFIG_SPI_FLASH_SIZE (4 << 20)
-
-#include "tegra-common-usb-gadget.h"
-#include "tegra-common-post.h"
-
-#endif /* _E2220_1170_H */
diff --git a/include/configs/warp.h b/include/configs/warp.h
index f17eea117f..0f97804eb2 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -63,7 +63,6 @@
/* PMIC */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
-#define CONFIG_POWER_MAX77696
#define CONFIG_EXTRA_ENV_SETTINGS \
"script=boot.scr\0" \
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index d75de368c5..d800f679d5 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -90,6 +90,7 @@ enum uclass_id {
UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
UCLASS_PWM, /* Pulse-width modulator */
UCLASS_PWRSEQ, /* Power sequence device */
+ UCLASS_QFW, /* QEMU firmware config device */
UCLASS_RAM, /* RAM controller */
UCLASS_REGULATOR, /* Regulator device */
UCLASS_REMOTEPROC, /* Remote Processor device */
diff --git a/include/hw_sha.h b/include/hw_sha.h
index 991e496a3c..d4f3471c43 100644
--- a/include/hw_sha.h
+++ b/include/hw_sha.h
@@ -14,12 +14,38 @@
* @param in_addr A pointer to the input buffer
* @param bufleni Byte length of input buffer
* @param out_addr A pointer to the output buffer. When complete
+ * 64 bytes are copied to pout[0]...pout[63]. Thus, a user
+ * should allocate at least 64 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha512
+ */
+void hw_sha512(const uchar *in_addr, uint buflen, uchar *out_addr,
+ uint chunk_size);
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
+ * 48 bytes are copied to pout[0]...pout[47]. Thus, a user
+ * should allocate at least 48 bytes at pOut in advance.
+ * @param chunk_size chunk size for sha384
+ */
+void hw_sha384(const uchar *in_addr, uint buflen, uchar *out_addr,
+ uint chunk_size);
+
+/**
+ * Computes hash value of input pbuf using h/w acceleration
+ *
+ * @param in_addr A pointer to the input buffer
+ * @param bufleni Byte length of input buffer
+ * @param out_addr A pointer to the output buffer. When complete
* 32 bytes are copied to pout[0]...pout[31]. Thus, a user
* should allocate at least 32 bytes at pOut in advance.
* @param chunk_size chunk size for sha256
*/
-void hw_sha256(const uchar * in_addr, uint buflen,
- uchar * out_addr, uint chunk_size);
+void hw_sha256(const uchar *in_addr, uint buflen, uchar *out_addr,
+ uint chunk_size);
/**
* Computes hash value of input pbuf using h/w acceleration
@@ -31,8 +57,8 @@ void hw_sha256(const uchar * in_addr, uint buflen,
* should allocate at least 32 bytes at pOut in advance.
* @param chunk_size chunk_size for sha1
*/
-void hw_sha1(const uchar * in_addr, uint buflen,
- uchar * out_addr, uint chunk_size);
+void hw_sha1(const uchar *in_addr, uint buflen, uchar *out_addr,
+ uint chunk_size);
/*
* Create the context for sha progressive hashing using h/w acceleration
@@ -56,7 +82,7 @@ int hw_sha_init(struct hash_algo *algo, void **ctxp);
* @return 0 if ok, -ve on error
*/
int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
- unsigned int size, int is_last);
+ unsigned int size, int is_last);
/*
* Copy sha hash result at destination location
@@ -70,6 +96,6 @@ int hw_sha_update(struct hash_algo *algo, void *ctx, const void *buf,
* @return 0 if ok, -ve on error
*/
int hw_sha_finish(struct hash_algo *algo, void *ctx, void *dest_buf,
- int size);
+ int size);
#endif
diff --git a/include/linux/string.h b/include/linux/string.h
index d67998e5c4..dd255f2163 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -35,6 +35,9 @@ extern char * strcat(char *, const char *);
#ifndef __HAVE_ARCH_STRNCAT
extern char * strncat(char *, const char *, __kernel_size_t);
#endif
+#ifndef __HAVE_ARCH_STRLCAT
+size_t strlcat(char *, const char *, size_t);
+#endif
#ifndef __HAVE_ARCH_STRCMP
extern int strcmp(const char *,const char *);
#endif
diff --git a/include/power/max77696_pmic.h b/include/power/max77696_pmic.h
deleted file mode 100644
index 69bb7da349..0000000000
--- a/include/power/max77696_pmic.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2015 Freescale Semiconductor, Inc.
- * Fabio Estevam <fabio.estevam@freescale.com>
- */
-
-#ifndef __MAX77696_PMIC_H__
-#define __MAX77696_PMIC_H__
-
-#define CONFIG_POWER_MAX77696_I2C_ADDR 0x3C
-
-enum {
- L01_CNFG1 = 0x43,
- L01_CNFG2,
- L02_CNFG1,
- L02_CNFG2,
- L03_CNFG1,
- L03_CNFG2,
- L04_CNFG1,
- L04_CNFG2,
- L05_CNFG1,
- L05_CNFG2,
- L06_CNFG1,
- L06_CNFG2,
- L07_CNFG1,
- L07_CNFG2,
- L08_CNFG1,
- L08_CNFG2,
- L09_CNFG1,
- L09_CNFG2,
- L10_CNFG1,
- L10_CNFG2,
- LDO_INT1,
- LDO_INT2,
- LDO_INT1M,
- LDO_INT2M,
- LDO_CNFG3,
- SW1_CNTRL,
- SW2_CNTRL,
- SW3_CNTRL,
- SW4_CNTRL,
- EPDCNFG,
- EPDINTS,
- EPDINT,
- EPDINTM,
- EPDVCOM,
- EPDVEE,
- EPDVNEG,
- EPDVPOS,
- EPDVDDH,
- EPDSEQ,
- EPDOKINTS,
- CID = 0x9c,
- PMIC_NUM_OF_REGS,
-};
-
-int power_max77696_init(unsigned char bus);
-
-#endif
diff --git a/include/qfw.h b/include/qfw.h
index cea8e11d44..7ca132e66a 100644
--- a/include/qfw.h
+++ b/include/qfw.h
@@ -8,7 +8,12 @@
#include <linux/list.h>
-enum qemu_fwcfg_items {
+/*
+ * List of firmware configuration item selectors. The official source of truth
+ * for these is the QEMU source itself; see
+ * https://github.com/qemu/qemu/blob/master/hw/nvram/fw_cfg.c
+ */
+enum {
FW_CFG_SIGNATURE = 0x00,
FW_CFG_ID = 0x01,
FW_CFG_UUID = 0x02,
@@ -66,8 +71,10 @@ enum {
#define FW_CFG_DMA_SKIP (1 << 2)
#define FW_CFG_DMA_SELECT (1 << 3)
+/* Bit set in FW_CFG_ID response to indicate DMA interface availability. */
#define FW_CFG_DMA_ENABLED (1 << 1)
+/* Structs read from FW_CFG_FILE_DIR. */
struct fw_cfg_file {
__be32 size;
__be16 select;
@@ -82,19 +89,7 @@ struct fw_file {
};
struct fw_cfg_file_iter {
- struct list_head *entry; /* structure to iterate file list */
-};
-
-struct fw_cfg_dma_access {
- __be32 control;
- __be32 length;
- __be64 address;
-};
-
-struct fw_cfg_arch_ops {
- void (*arch_read_pio)(uint16_t selector, uint32_t size,
- void *address);
- void (*arch_read_dma)(struct fw_cfg_dma_access *dma);
+ struct list_head *entry, *end; /* structures to iterate file list */
};
struct bios_linker_entry {
@@ -146,37 +141,178 @@ struct bios_linker_entry {
};
} __packed;
+/* DMA transfer control data between UCLASS_QFW and QEMU. */
+struct qfw_dma {
+ __be32 control;
+ __be32 length;
+ __be64 address;
+};
+
+/* uclass per-device configuration information */
+struct qfw_dev {
+ struct udevice *dev; /* Transport device */
+ bool dma_present; /* DMA interface usable? */
+ struct list_head fw_list; /* Cached firmware file list */
+};
+
+/* Ops used internally between UCLASS_QFW and its driver implementations. */
+struct dm_qfw_ops {
+ /**
+ * read_entry_io() - Read a firmware config entry using the regular
+ * IO interface for the platform (either PIO or MMIO)
+ *
+ * Supply %FW_CFG_INVALID as the entry to continue a previous read. In
+ * this case, no selector will be issued before reading.
+ *
+ * @dev: Device to use
+ * @entry: Firmware config entry number (e.g. %FW_CFG_SIGNATURE)
+ * @size: Number of bytes to read
+ * @address: Target location for read
+ */
+ void (*read_entry_io)(struct udevice *dev, u16 entry, u32 size,
+ void *address);
+
+ /**
+ * read_entry_dma() - Read a firmware config entry using the DMA
+ * interface
+ *
+ * Supply FW_CFG_INVALID as the entry to continue a previous read. In
+ * this case, no selector will be issued before reading.
+ *
+ * This method assumes DMA availability has already been confirmed.
+ *
+ * @dev: Device to use
+ * @dma: DMA transfer control struct
+ */
+ void (*read_entry_dma)(struct udevice *dev, struct qfw_dma *dma);
+};
+
+#define dm_qfw_get_ops(dev) \
+ ((struct dm_qfw_ops *)(dev)->driver->ops)
+
/**
- * Initialize QEMU fw_cfg interface
+ * qfw_register() - Called by a qfw driver after successful probe.
+ * @dev: Device registering itself with the uclass.
+ *
+ * Used internally by driver implementations on successful probe.
*
- * @ops: arch specific read operations
+ * Return: 0 on success, negative otherwise.
*/
-void qemu_fwcfg_init(struct fw_cfg_arch_ops *ops);
+int qfw_register(struct udevice *dev);
-void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address);
-int qemu_fwcfg_read_firmware_list(void);
-struct fw_file *qemu_fwcfg_find_file(const char *name);
+struct udevice;
/**
- * Get system cpu number
+ * qfw_get_dev() - Get QEMU firmware config device.
+ * @devp: Pointer to be filled with address of the qfw device.
*
- * @return: cpu number in system
+ * Gets the active QEMU firmware config device, for use with qfw_read_entry()
+ * and others.
+ *
+ * Return: 0 on success, -ENODEV if the device is not available.
*/
-int qemu_fwcfg_online_cpus(void);
+int qfw_get_dev(struct udevice **devp);
-/* helper functions to iterate firmware file list */
-struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter);
-struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter);
-bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter);
+/**
+ * qfw_read_entry() - Read a QEMU firmware config entry
+ * @dev: QFW device to use.
+ * @entry: Firmware config entry number (e.g. %FW_CFG_SIGNATURE).
+ * @size: Number of bytes to read.
+ * @address: Target location for read.
+ *
+ * Reads a QEMU firmware config entry using @dev. DMA will be used if the QEMU
+ * machine supports it, otherwise PIO/MMIO.
+ */
+void qfw_read_entry(struct udevice *dev, u16 entry, u32 size, void *address);
-bool qemu_fwcfg_present(void);
-bool qemu_fwcfg_dma_present(void);
+/**
+ * qfw_read_firmware_list() - Read and cache the QEMU firmware config file
+ * list.
+ * @dev: QFW device to use.
+ *
+ * Reads the QEMU firmware config file list, caching it against @dev for later
+ * use with qfw_find_file().
+ *
+ * If the list has already been read, does nothing and returns 0 (success).
+ *
+ * Return: 0 on success, -ENOMEM if unable to allocate.
+ */
+int qfw_read_firmware_list(struct udevice *dev);
+
+/**
+ * qfw_find_file() - Find a file by name in the QEMU firmware config file
+ * list.
+ * @dev: QFW device to use.
+ * @name: Name of file to locate (e.g. "etc/table-loader").
+ *
+ * Finds a file by name in the QEMU firmware config file list cached against
+ * @dev. You must call qfw_read_firmware_list() successfully first for this to
+ * succeed.
+ *
+ * Return: Pointer to &struct fw_file if found, %NULL if not present.
+ */
+struct fw_file *qfw_find_file(struct udevice *dev, const char *name);
+
+/**
+ * qfw_online_cpus() - Get number of CPUs in system from QEMU firmware config.
+ * @dev: QFW device to use.
+ *
+ * Asks QEMU to report how many CPUs it is emulating for the machine.
+ *
+ * Return: Number of CPUs in the system.
+ */
+int qfw_online_cpus(struct udevice *dev);
+
+/**
+ * qfw_file_iter_init() - Start iterating cached firmware file list.
+ * @dev: QFW device to use.
+ * @iter: Iterator to be initialised.
+ *
+ * Starts iterating the cached firmware file list in @dev. You must call
+ * qfw_read_firmware_list() successfully first, otherwise you will always get
+ * an empty list.
+ *
+ * qfw_file_iter_init() returns the first &struct fw_file, but it may be
+ * invalid if the list is empty. Check that ``!qfw_file_iter_end(&iter)``
+ * first.
+ *
+ * Return: The first &struct fw_file item in the firmware file list, if any.
+ * Only valid when qfw_file_iter_end() is not true after the call.
+ */
+struct fw_file *qfw_file_iter_init(struct udevice *dev,
+ struct fw_cfg_file_iter *iter);
+
+/**
+ * qfw_file_iter_next() - Iterate cached firmware file list.
+ * @iter: Iterator to use.
+ *
+ * Continues iterating the cached firmware file list in @dev. You must call
+ * qfw_file_iter_init() first to initialise it. Check that
+ * ``!qfw_file_iter_end(&iter)`` before using the return value of this
+ * function.
+ *
+ * Return: The next &struct fw_file item in the firmware file list. Only valid
+ * when qfw_file_iter_end() is not true after the call.
+ */
+struct fw_file *qfw_file_iter_next(struct fw_cfg_file_iter *iter);
+
+/**
+ * qfw_file_iter_end() - Check if iter is at end of list.
+ * @iter: Iterator to use.
+ *
+ * Checks whether or not the iterator is at its end position. If so, the
+ * qfw_file_iter_init() or qfw_file_iter_next() call that immediately preceded
+ * returned invalid data.
+ *
+ * Return: True if the iterator is at its end; false otherwise.
+ */
+bool qfw_file_iter_end(struct fw_cfg_file_iter *iter);
/**
- * qemu_cpu_fixup() - Fix up the CPUs for QEMU
+ * qemu_cpu_fixup() - Fix up the CPUs for QEMU.
*
- * @return 0 if OK, -ENODEV if no CPUs, -ENOMEM if out of memory, other -ve on
- * on other error
+ * Return: 0 on success, -ENODEV if no CPUs, -ENOMEM if out of memory, other <
+ * 0 on on other error.
*/
int qemu_cpu_fixup(void);
diff --git a/include/scmi_protocols.h b/include/scmi_protocols.h
index ccab97c96c..2db71697e8 100644
--- a/include/scmi_protocols.h
+++ b/include/scmi_protocols.h
@@ -23,6 +23,7 @@ enum scmi_std_protocol {
SCMI_PROTOCOL_ID_CLOCK = 0x14,
SCMI_PROTOCOL_ID_SENSOR = 0x15,
SCMI_PROTOCOL_ID_RESET_DOMAIN = 0x16,
+ SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN = 0x17,
};
enum scmi_status_code {
@@ -176,4 +177,116 @@ struct scmi_rd_reset_out {
s32 status;
};
+/*
+ * SCMI Voltage Domain Protocol
+ */
+
+enum scmi_voltage_domain_message_id {
+ SCMI_VOLTAGE_DOMAIN_ATTRIBUTES = 0x3,
+ SCMI_VOLTAGE_DOMAIN_CONFIG_SET = 0x5,
+ SCMI_VOLTAGE_DOMAIN_CONFIG_GET = 0x6,
+ SCMI_VOLTAGE_DOMAIN_LEVEL_SET = 0x7,
+ SCMI_VOLTAGE_DOMAIN_LEVEL_GET = 0x8,
+};
+
+#define SCMI_VOLTD_NAME_LEN 16
+
+#define SCMI_VOLTD_CONFIG_MASK GENMASK(3, 0)
+#define SCMI_VOLTD_CONFIG_OFF 0
+#define SCMI_VOLTD_CONFIG_ON 0x7
+
+/**
+ * struct scmi_voltd_attr_in - Payload for VOLTAGE_DOMAIN_ATTRIBUTES message
+ * @domain_id: SCMI voltage domain ID
+ */
+struct scmi_voltd_attr_in {
+ u32 domain_id;
+};
+
+/**
+ * struct scmi_voltd_attr_out - Payload for VOLTAGE_DOMAIN_ATTRIBUTES response
+ * @status: SCMI command status
+ * @attributes: Retrieved attributes of the voltage domain
+ * @name: Voltage domain name
+ */
+struct scmi_voltd_attr_out {
+ s32 status;
+ u32 attributes;
+ char name[SCMI_VOLTD_NAME_LEN];
+};
+
+/**
+ * struct scmi_voltd_config_set_in - Message payload for VOLTAGE_CONFIG_SET cmd
+ * @domain_id: SCMI voltage domain ID
+ * @config: Configuration data of the voltage domain
+ */
+struct scmi_voltd_config_set_in {
+ u32 domain_id;
+ u32 config;
+};
+
+/**
+ * struct scmi_voltd_config_set_out - Response for VOLTAGE_CONFIG_SET command
+ * @status: SCMI command status
+ */
+struct scmi_voltd_config_set_out {
+ s32 status;
+};
+
+/**
+ * struct scmi_voltd_config_get_in - Message payload for VOLTAGE_CONFIG_GET cmd
+ * @domain_id: SCMI voltage domain ID
+ */
+struct scmi_voltd_config_get_in {
+ u32 domain_id;
+};
+
+/**
+ * struct scmi_voltd_config_get_out - Response for VOLTAGE_CONFIG_GET command
+ * @status: SCMI command status
+ * @config: Configuration data of the voltage domain
+ */
+struct scmi_voltd_config_get_out {
+ s32 status;
+ u32 config;
+};
+
+/**
+ * struct scmi_voltd_level_set_in - Message payload for VOLTAGE_LEVEL_SET cmd
+ * @domain_id: SCMI voltage domain ID
+ * @flags: Parameter flags for configuring target level
+ * @voltage_level: Target voltage level in microvolts (uV)
+ */
+struct scmi_voltd_level_set_in {
+ u32 domain_id;
+ u32 flags;
+ s32 voltage_level;
+};
+
+/**
+ * struct scmi_voltd_level_set_out - Response for VOLTAGE_LEVEL_SET command
+ * @status: SCMI command status
+ */
+struct scmi_voltd_level_set_out {
+ s32 status;
+};
+
+/**
+ * struct scmi_voltd_level_get_in - Message payload for VOLTAGE_LEVEL_GET cmd
+ * @domain_id: SCMI voltage domain ID
+ */
+struct scmi_voltd_level_get_in {
+ u32 domain_id;
+};
+
+/**
+ * struct scmi_voltd_level_get_out - Response for VOLTAGE_LEVEL_GET command
+ * @status: SCMI command status
+ * @voltage_level: Voltage level in microvolts (uV)
+ */
+struct scmi_voltd_level_get_out {
+ s32 status;
+ s32 voltage_level;
+};
+
#endif /* _SCMI_PROTOCOLS_H */
diff --git a/include/tee/optee.h b/include/tee/optee.h
index affa937da0..ebdfe5e98d 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -71,9 +71,9 @@ static inline int optee_verify_bootm_image(unsigned long image_addr,
#endif
#if defined(CONFIG_OPTEE) && defined(CONFIG_OF_LIBFDT)
-int optee_copy_fdt_nodes(const void *old_blob, void *new_blob);
+int optee_copy_fdt_nodes(void *new_blob);
#else
-static inline int optee_copy_fdt_nodes(const void *old_blob, void *new_blob)
+static inline int optee_copy_fdt_nodes(void *new_blob)
{
return 0;
}