Merge branch '2023-01-20-finish-CONFIG-migration-work'

- Merge in the final batch of CONFIG to Kconfig/CFG migration work. This
  includes a fix for a number of ns16550 or similar UARTs due to a
  migration bug. We also pull in a revert for enabling CONFIG_VIDEO on
  tools-only_defconfig.

9 files changed, 56 insertions, 66 deletions

diff --git a/include/command.h b/include/command.h
index 3c6132e0c5..0db4898062 100644
--- a/include/command.h
+++ b/include/command.h
@@ -18,8 +18,8 @@
 #endif
 
 /* Default to a width of 8 characters for help message command width */
-#ifndef CONFIG_SYS_HELP_CMD_WIDTH
-#define CONFIG_SYS_HELP_CMD_WIDTH	10
+#ifndef CFG_SYS_HELP_CMD_WIDTH
+#define CFG_SYS_HELP_CMD_WIDTH	10
 #endif
 
 #ifndef	__ASSEMBLY__
diff --git a/include/env_callback.h b/include/env_callback.h
index 85e7fe25f8..a9a14f2a84 100644
--- a/include/env_callback.h
+++ b/include/env_callback.h
@@ -14,8 +14,8 @@
 #define ENV_CALLBACK_VAR ".callbacks"
 
 /* Board configs can define additional static callback bindings */
-#ifndef CONFIG_ENV_CALLBACK_LIST_STATIC
-#define CONFIG_ENV_CALLBACK_LIST_STATIC
+#ifndef CFG_ENV_CALLBACK_LIST_STATIC
+#define CFG_ENV_CALLBACK_LIST_STATIC
 #endif
 
 #ifdef CONFIG_SILENT_CONSOLE
@@ -80,7 +80,7 @@
 	SILENT_CALLBACK \
 	"stdin:console,stdout:console,stderr:console," \
 	"serial#:serialno," \
-	CONFIG_ENV_CALLBACK_LIST_STATIC
+	CFG_ENV_CALLBACK_LIST_STATIC
 
 #ifndef CONFIG_SPL_BUILD
 void env_callback_init(struct env_entry *var_entry);
diff --git a/include/fm_eth.h b/include/fm_eth.h
index 6012a449fd..8b133e703b 100644
--- a/include/fm_eth.h
+++ b/include/fm_eth.h
@@ -51,18 +51,18 @@ enum fm_eth_type {
  */
 #ifdef CONFIG_SYS_FMAN_V3
 #ifdef CONFIG_TARGET_LS1046AFRWY
-#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfd000)
+#define CFG_SYS_FM1_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfd000)
 #else
-#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfc000)
+#define CFG_SYS_FM1_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfc000)
 #endif
-#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfd000)
+#define CFG_SYS_FM1_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xfd000)
 #if (CFG_SYS_NUM_FMAN == 2)
-#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM2_ADDR + 0xfc000)
-#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM2_ADDR + 0xfd000)
+#define CFG_SYS_FM2_DTSEC_MDIO_ADDR	(CFG_SYS_FSL_FM2_ADDR + 0xfc000)
+#define CFG_SYS_FM2_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM2_ADDR + 0xfd000)
 #endif
 #else
-#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xe1120)
-#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xf1000)
+#define CFG_SYS_FM1_DTSEC1_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xe1120)
+#define CFG_SYS_FM1_TGEC_MDIO_ADDR	(CFG_SYS_FSL_FM1_ADDR + 0xf1000)
 #endif
 
 #define DEFAULT_FM_MDIO_NAME "FSL_MDIO0"
@@ -77,7 +77,7 @@ enum fm_eth_type {
 #ifdef CONFIG_SYS_FMAN_V3
 #define FM_DTSEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_DTSEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_1G_E,					\
@@ -91,7 +91,7 @@ enum fm_eth_type {
 #ifdef CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
@@ -105,7 +105,7 @@ enum fm_eth_type {
 #if (CFG_SYS_NUM_FMAN == 2)
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM2_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM2_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
@@ -118,7 +118,7 @@ enum fm_eth_type {
 #else
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
@@ -134,7 +134,7 @@ enum fm_eth_type {
 #if (CFG_SYS_NUM_FM1_10GEC >= 3)
 #define FM_TGEC_INFO_INITIALIZER2(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
@@ -149,7 +149,7 @@ enum fm_eth_type {
 #else
 #define FM_DTSEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_DTSEC1_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_1G_E,					\
@@ -162,7 +162,7 @@ enum fm_eth_type {
 
 #define FM_TGEC_INFO_INITIALIZER(idx, n) \
 {									\
-	FM_ETH_INFO_INITIALIZER(idx, CONFIG_SYS_FM1_TGEC_MDIO_ADDR)	\
+	FM_ETH_INFO_INITIALIZER(idx, CFG_SYS_FM1_TGEC_MDIO_ADDR)	\
 	.index		= idx,						\
 	.num		= n - 1,					\
 	.type		= FM_ETH_10G_E,					\
diff --git a/include/fpga.h b/include/fpga.h
index a4e16401da..ed688cc0fa 100644
--- a/include/fpga.h
+++ b/include/fpga.h
@@ -9,10 +9,6 @@
 #ifndef _FPGA_H_
 #define _FPGA_H_
 
-#ifndef CONFIG_MAX_FPGA_DEVICES
-#define CONFIG_MAX_FPGA_DEVICES		5
-#endif
-
 /* fpga_xxxx function return value definitions */
 #define FPGA_SUCCESS		0
 #define FPGA_FAIL		1
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 24229f6bc4..f336c6a23d 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -50,13 +50,12 @@ compute_dimm_parameters(const unsigned int ctrl_num,
  *
  * All data structures have to be on the stack
  */
-#define CONFIG_SYS_DIMM_SLOTS_PER_CTLR CONFIG_DIMM_SLOTS_PER_CTLR
 
 typedef struct {
 	generic_spd_eeprom_t
-	   spd_installed_dimms[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
+	   spd_installed_dimms[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR];
 	struct dimm_params_s
-	   dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_SYS_DIMM_SLOTS_PER_CTLR];
+	   dimm_params[CONFIG_SYS_NUM_DDR_CTLRS][CONFIG_DIMM_SLOTS_PER_CTLR];
 	memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS];
 	common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS];
 	fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS];
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index a7272e4be7..c43f780e4c 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -48,25 +48,25 @@
 #if defined(CONFIG_SYS_FSL_DDR1)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(1)
 typedef ddr1_spd_eeprom_t generic_spd_eeprom_t;
-#ifndef CONFIG_FSL_SDRAM_TYPE
-#define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR1
+#ifndef CFG_FSL_SDRAM_TYPE
+#define CFG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR1
 #endif
 #elif defined(CONFIG_SYS_FSL_DDR2)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(3)
 typedef ddr2_spd_eeprom_t generic_spd_eeprom_t;
-#ifndef CONFIG_FSL_SDRAM_TYPE
-#define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR2
+#ifndef CFG_FSL_SDRAM_TYPE
+#define CFG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR2
 #endif
 #elif defined(CONFIG_SYS_FSL_DDR3)
 typedef ddr3_spd_eeprom_t generic_spd_eeprom_t;
-#ifndef CONFIG_FSL_SDRAM_TYPE
-#define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR3
+#ifndef CFG_FSL_SDRAM_TYPE
+#define CFG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR3
 #endif
 #elif defined(CONFIG_SYS_FSL_DDR4)
 #define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR	(3)	/* FIXME */
 typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;
-#ifndef CONFIG_FSL_SDRAM_TYPE
-#define CONFIG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR4
+#ifndef CFG_FSL_SDRAM_TYPE
+#define CFG_FSL_SDRAM_TYPE	SDRAM_TYPE_DDR4
 #endif
 #endif	/* #if defined(CONFIG_SYS_FSL_DDR1) */
 
diff --git a/include/fsl_usb.h b/include/fsl_usb.h
index c0f076b06d..1abd1e5e57 100644
--- a/include/fsl_usb.h
+++ b/include/fsl_usb.h
@@ -40,24 +40,21 @@ struct ccsr_usb_phy {
 	u8	res_dc[0x334];
 };
 
-#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
-#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13)
+#define CFG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
+#define CFG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
+#define CFG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
+#define CFG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
+#define CFG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
 #ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
-#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK (5 << 4)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK (6 << 16)
-#define CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN (1 << 20)
+#define CFG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK (5 << 4)
+#define CFG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK (6 << 16)
+#define CFG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN (1 << 20)
 #endif
-#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
-#define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0)
-#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7)
-#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4)
+#define CFG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4)
+#define CFG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
+#define CFG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
+#define CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7)
+#define CFG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4)
 
 #define INC_DCNT_THRESHOLD_25MV        (0 << 4)
 #define INC_DCNT_THRESHOLD_50MV        (1 << 4)
@@ -74,14 +71,14 @@ struct ccsr_usb_phy {
 	u32	usb_enable_override;
 	u8	res[0xe4];
 };
-#define CONFIG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22)
-#define CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20)
-#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13
-#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16
-#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0
-#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3
-#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
-#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07
+#define CFG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22)
+#define CFG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20)
+#define CFG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13
+#define CFG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16
+#define CFG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0
+#define CFG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3
+#define CFG_SYS_FSL_USB_ENABLE_OVERRIDE 1
+#define CFG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07
 #endif
 
 /* USB Erratum Checking code */
diff --git a/include/ns16550.h b/include/ns16550.h
index 243226fc3d..e7e68663d0 100644
--- a/include/ns16550.h
+++ b/include/ns16550.h
@@ -26,15 +26,13 @@
 
 #include <linux/types.h>
 
-#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE)
+#if CONFIG_IS_ENABLED(DM_SERIAL) ||  defined(CONFIG_NS16550_DYNAMIC) || \
+	defined(CONFIG_DEBUG_UART)
 /*
  * For driver model we always use one byte per register, and sort out the
- * differences in the driver
+ * differences in the driver. In the case of CONFIG_NS16550_DYNAMIC we do
+ * similar, and CONFIG_DEBUG_UART is responsible for shifts in its own manner.
  */
-#define CONFIG_SYS_NS16550_REG_SIZE (-1)
-#endif
-
-#if defined(CONFIG_NS16550_DYNAMIC) || defined(CONFIG_DEBUG_UART)
 #define UART_REG(x)	unsigned char x
 #else
 #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0)
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 71642d257b..126623cf9a 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -20,8 +20,8 @@
 
 #define ULPI_ERROR	(1 << 8) /* overflow from any register value */
 
-#ifndef CONFIG_USB_ULPI_TIMEOUT
-#define CONFIG_USB_ULPI_TIMEOUT 1000	/* timeout in us */
+#ifndef CFG_USB_ULPI_TIMEOUT
+#define CFG_USB_ULPI_TIMEOUT 1000	/* timeout in us */
 #endif
 
 /*