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| author | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2020-07-17 08:04:48 -0400 |
| commit | 7c3cc6f106ed1ca13b0ff6eea9f8e1473240aef3 (patch) | |
| tree | 8c67a8ed3ab24b1421161960103d8614cbde659a /include/spi.h | |
| parent | 42e7659db0ac7089d3a2f80ee1c3b8eb64d84706 (diff) | |
| parent | d40d2c570600396b54dece16429727ef50cfeef0 (diff) | |
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- New timer API to allow delays with a 32-bit microsecond timer
- Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core
- x86: Enable ACPI table generation by default
- x86: Enable the copy framebuffer on Coral
- x86: A few fixes to FSP2 with ApolloLake
- x86: Drop setup_pcat_compatibility()
- x86: Primary-to-Sideband Bus minor fixes
Diffstat (limited to 'include/spi.h')
| -rw-r--r-- | include/spi.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/spi.h b/include/spi.h index a37900b2fd..98ba9e796d 100644 --- a/include/spi.h +++ b/include/spi.h @@ -13,8 +13,8 @@ #include <linux/bitops.h> /* SPI mode flags */ -#define SPI_CPHA BIT(0) /* clock phase */ -#define SPI_CPOL BIT(1) /* clock polarity */ +#define SPI_CPHA BIT(0) /* clock phase (1 = SPI_CLOCK_PHASE_SECOND) */ +#define SPI_CPOL BIT(1) /* clock polarity (1 = SPI_POLARITY_HIGH) */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) |