diff options
author | Tom Rini <trini@konsulko.com> | 2021-06-07 19:12:04 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-06-07 19:12:04 -0400 |
commit | 24e1e8841c59956aaf0bd65720d0dbdd61aa3632 (patch) | |
tree | 09d104dbed9bf79b7e4d05a799e18cc9485836ff /include/lmb.h | |
parent | e3b64beda5dd1a6b6bedfd1fe0e50be1ddea7044 (diff) | |
parent | ade4e0428f4d85454fdb3818702facc7728a274a (diff) |
Merge branch '2021-06-07-arm-cache-cp15-improvements' into next
To quote the series author, Patrick Delaunay:
On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
protected by a firewall. This region is reserved in the device with
the "no-map" property as defined in the binding file
doc/device-tree-bindings/reserved-memory/reserved-memory.txt.
Sometime the platform boot failed in U-Boot on a Cortex A7 access to
this region (depending of the binary and the issue can change with compiler
version or with code alignment), then the firewall raise an error,
for example:
E/TC:0 tzc_it_handler:19 TZC permission failure
E/TC:0 dump_fail_filter:420 Permission violation on filter 0
E/TC:0 dump_fail_filter:425 Violation @0xde5c6bf0, non-secure privileged read,
AXI ID 5c0
E/TC:0 Panic
After investigation, the forbidden access is a speculative request performed
by the Cortex A7 because all the DDR is mapped as MEMORY with CACHEABLE
property.
The issue is solved only when the region reserved by OP-TEE is no more
mapped in U-Boot as it is already done in Linux kernel.
Tested on DK2 board with OP-TEE 3.12 / TF-A 2.4:
With hard-coded address for OP-TEE reserved memory,
the error doesn't occur.
void dram_bank_mmu_setup(int bank)
{
....
for (i = start >> MMU_SECTION_SHIFT;
i < (start >> MMU_SECTION_SHIFT) + (size >> MMU_SECTION_SHIFT);
i++) {
option = DCACHE_DEFAULT_OPTION;
if (i >= 0xde0)
option = INVALID_ENTRY;
set_section_dcache(i, option);
}
}
Just by modifying the test on 0xde0 to 0xdf0, the OP-TEE memory protected
by firewall is mapped cacheable and the error occurs.
I think that it can be a general issue for ARM architecture: the "no-map" tag
of reserved memory in device should be respected by U-Boot if firewall
is configured before U-Boot execution.
But I don't propose a generic solution in
arm/lib/cache-cp15.c:dram_bank_mmu_setup()
because the device tree parsing done in lmb_init_and_reserve() takes a
long time when it is executed without data cache.
Diffstat (limited to 'include/lmb.h')
-rw-r--r-- | include/lmb.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/include/lmb.h b/include/lmb.h index 541e17093c..3c4afdf9f0 100644 --- a/include/lmb.h +++ b/include/lmb.h @@ -13,6 +13,16 @@ */ /** + * enum lmb_flags - definition of memory region attributes + * @LMB_NONE: no special request + * @LMB_NOMAP: don't add to mmu configuration + */ +enum lmb_flags { + LMB_NONE = 0x0, + LMB_NOMAP = 0x4, +}; + +/** * struct lmb_property - Description of one region. * * @base: Base address of the region. @@ -21,6 +31,7 @@ struct lmb_property { phys_addr_t base; phys_size_t size; + enum lmb_flags flags; }; /** @@ -69,6 +80,17 @@ extern void lmb_init_and_reserve_range(struct lmb *lmb, phys_addr_t base, phys_size_t size, void *fdt_blob); extern long lmb_add(struct lmb *lmb, phys_addr_t base, phys_size_t size); extern long lmb_reserve(struct lmb *lmb, phys_addr_t base, phys_size_t size); +/** + * lmb_reserve_flags - Reserve one region with a specific flags bitfield. + * + * @lmb the logical memory block struct + * @base base address of the memory region + * @size size of the memory region + * @flags flags for the memory region + * @return 0 if OK, > 0 for coalesced region or a negative error code. + */ +long lmb_reserve_flags(struct lmb *lmb, phys_addr_t base, + phys_size_t size, enum lmb_flags flags); extern phys_addr_t lmb_alloc(struct lmb *lmb, phys_size_t size, ulong align); extern phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align, phys_addr_t max_addr); @@ -78,6 +100,15 @@ extern phys_addr_t lmb_alloc_addr(struct lmb *lmb, phys_addr_t base, phys_size_t size); extern phys_size_t lmb_get_free_size(struct lmb *lmb, phys_addr_t addr); extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr); +/** + * lmb_is_reserved_flags - test if tha address is in reserved region with a bitfield flag + * + * @lmb the logical memory block struct + * @addr address to be tested + * @flags flags bitfied to be tested + * @return 0 if not reserved or reserved without the requested flag else 1 + */ +int lmb_is_reserved_flags(struct lmb *lmb, phys_addr_t addr, int flags); extern long lmb_free(struct lmb *lmb, phys_addr_t base, phys_size_t size); extern void lmb_dump_all(struct lmb *lmb); @@ -92,6 +123,13 @@ lmb_size_bytes(struct lmb_region *type, unsigned long region_nr) void board_lmb_reserve(struct lmb *lmb); void arch_lmb_reserve(struct lmb *lmb); +/* Low level functions */ + +static inline bool lmb_is_nomap(struct lmb_property *m) +{ + return m->flags & LMB_NOMAP; +} + #endif /* __KERNEL__ */ #endif /* _LINUX_LMB_H */ |