Merge tag 'xilinx-for-v2023.10-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2023.10-rc1 v2

axi_emac:
- Change return value if RX packet is not ready

cadence_qspi:
- Enable flash reset for Versal NET

dt:
- Various DT syncups with Linux kernel
- SOM - reserved pmufw memory location

fpga:
- Add load event

mtd:
- Add missing dependency for FLASH_CFI_MTD

spi/nand:
- Minor cleanup in Xilinx drivers

versal-net:
- Prioritize boot device in boot_targets
- Wire mini ospi/qspi/emmc configurations

watchdog:
- Use new versal-wwdt property

xilinx:
- fix sparse warnings in various places ps7_init*
- add missing headers
- consolidate code around zynqmp_mmio_read/write
- switch to amd.com email

zynqmp_clk:
- Add handling for gem rx/tsu clocks

zynq_gem:
- Configure mdio clock at run time

zynq:
- Enable fdt overlay support

zynq_sdhci:
- Call dll reset only for ZynqMP SOCs

1 files changed, 17 insertions, 0 deletions

diff --git a/include/event.h b/include/event.h
index fe41080fa6..daf44bf8a8 100644
--- a/include/event.h
+++ b/include/event.h
@@ -11,6 +11,7 @@
 #define __event_h
 
 #include <dm/ofnode_decl.h>
+#include <linux/types.h>
 
 /**
  * enum event_t - Types of events supported by U-Boot
@@ -31,6 +32,9 @@ enum event_t {
 	/* Init hooks */
 	EVT_MISC_INIT_F,
 
+	/* Fpga load hook */
+	EVT_FPGA_LOAD,
+
 	/* Device tree fixups before booting */
 	EVT_FT_FIXUP,
 
@@ -60,6 +64,19 @@ union event_data {
 	} dm;
 
 	/**
+	 * struct event_fpga_load - fpga load event
+	 *
+	 * @buf: The buffer that was loaded into the fpga
+	 * @bsize: The size of the buffer that was loaded into the fpga
+	 * @result: Result of the load operation
+	 */
+	struct event_fpga_load {
+		const void *buf;
+		size_t bsize;
+		int result;
+	} fpga_load;
+
+	/**
 	 * struct event_ft_fixup - FDT fixup before booting
 	 *
 	 * @tree: tree to update