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| author | Tom Rini <trini@konsulko.com> | 2021-12-03 09:02:49 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-12-03 09:02:49 -0500 |
| commit | 558002a0f2230bedf6b38716f3ed86a92fc9010b (patch) | |
| tree | 95ef5e7f16e6b75e04d62a5c8910f35291d45ee3 /include/dt-bindings/interrupt-controller/riscv-hart.h | |
| parent | 5b9ee01685290653671072d0030cd7ba9da3a705 (diff) | |
| parent | c0ffc12a701621dc72dfc896965cbfe5b0dbf9b4 (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Diffstat (limited to 'include/dt-bindings/interrupt-controller/riscv-hart.h')
| -rw-r--r-- | include/dt-bindings/interrupt-controller/riscv-hart.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/include/dt-bindings/interrupt-controller/riscv-hart.h b/include/dt-bindings/interrupt-controller/riscv-hart.h new file mode 100644 index 0000000000..c4331b8521 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/riscv-hart.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* Copyright (c) 2020-2021 Microchip Technology Inc */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H + +#define HART_INT_U_SOFT 0 +#define HART_INT_S_SOFT 1 +#define HART_INT_M_SOFT 3 +#define HART_INT_U_TIMER 4 +#define HART_INT_S_TIMER 5 +#define HART_INT_M_TIMER 7 +#define HART_INT_U_EXT 8 +#define HART_INT_S_EXT 9 +#define HART_INT_M_EXT 11 + +#endif /* _DT_BINDINGS_INTERRUPT_CONTROLLER_RISCV_HART_H */ |