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authorMaksim Kiselev <bigunclemax@gmail.com>2023-11-11 16:33:08 +0300
committerAndre Przywara <andre.przywara@arm.com>2024-03-03 23:43:43 +0000
commit2b9d6a18435f4472bb79409ffdb24095ee6b5f10 (patch)
tree0b69f39a3f6e8a99e96758a5c1d81902bd0cb77b /include/api.h
parenteac52e4be4e234d563d6911737ee7ccdc0ada1f1 (diff)
spi: sunxi: Add support for R329/D1/R528/T113 SPI controller
These SoCs have two SPI controllers that are quite similar to the SPI on previous Allwinner SoCs. The main difference is that new SoCs don't have a clock divider (SPI_CCR register) inside SPI IP. Instead SPI sample mode should be configured depending on the input clock. For now SPI input clock source selection is not supported by this driver, and only HOSC@24MHz can be used as input clock. Therefore, according to the, manual we could change the SPI sample mode from delay half cycle(default) to normal. This patch adds a quirk for this kind of SPI controllers Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Tested-by: Sam Edwards <CFSworks@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
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