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authorMichal Simek <michal.simek@amd.com>2023-11-06 12:56:47 +0100
committerLeo Yu-Chi Liang <ycliang@andestech.com>2023-12-18 11:08:49 +0800
commit7576ab2facae92f4062f88c4f643e2548e112437 (patch)
tree6573bae7bf45cdb75e9e98954330ba7b0d534b2b /drivers/timer/starfive-timer.c
parent0d14f04d5d2c943ecd3f9c8ced26dfd5815da698 (diff)
riscv: Add support for AMD/Xilinx MicroBlaze V
MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Diffstat (limited to 'drivers/timer/starfive-timer.c')
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