Merge tag 'u-boot-stm32-20200707' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- arch and board update for stm32mp15:
  - use OPP information in device tree for 800MHz/650MHz support
  - ram: inprovments of test command
  - solve boot on closed chip when access to DBGMCU_IDC is protected
  - stm32prog command: Add "device anme" during USB enumeration
  - update configs: activate WATCHDOG and 'env erase' command,
    increase teed partition, support SD card after NOR boot by default and
    use env info in env_check
  - some sboard cleanups: gpio hog in dh board, specific driver for
    type-c stusb1600 controller code in a driver move part of code in spl.c
    and in common directory
- fix STM32 compatible for dwc_eth_qos driver
- support of new pinctrl ops get_dir_flags/set_dir_flags in stm32 and stmfx
  drivers
- vrefbuf: fix a possible overshoot when re-enabling

1 files changed, 14 insertions, 2 deletions

diff --git a/drivers/power/regulator/stm32-vrefbuf.c b/drivers/power/regulator/stm32-vrefbuf.c
index 250773514f..92136961c2 100644
--- a/drivers/power/regulator/stm32-vrefbuf.c
+++ b/drivers/power/regulator/stm32-vrefbuf.c
@@ -43,8 +43,20 @@ static int stm32_vrefbuf_set_enable(struct udevice *dev, bool enable)
 	u32 val;
 	int ret;
 
-	clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ | STM32_ENVR,
-			enable ? STM32_ENVR : STM32_HIZ);
+	if (enable && !(readl(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR)) {
+		/*
+		 * There maybe an overshoot:
+		 * - when disabling, then re-enabling vrefbuf too quickly
+		 * - or upon platform reset as external capacitor maybe slow
+		 *   discharging (VREFBUF is HiZ at reset by default).
+		 * So force active discharge (HiZ=0) for 1ms before enabling.
+		 */
+		clrbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_HIZ);
+		udelay(1000);
+	}
+
+	clrsetbits_le32(priv->base + STM32_VREFBUF_CSR, STM32_ENVR,
+			enable ? STM32_ENVR : 0);
 	if (!enable)
 		return 0;