diff options
| author | Marek Behún <marek.behun@nic.cz> | 2021-11-11 16:35:44 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2021-12-15 08:57:36 +0100 |
| commit | e967c84a6d211562ff800a00b0c30d7aa808ae4b (patch) | |
| tree | 087540b4e39f5a29b7ebe6a40218dc7576931d55 /drivers/pci/pci-aardvark.c | |
| parent | cfbd2bc695b87434e52e1b1073756b823f18f09d (diff) | |
pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci/pci-aardvark.c')
| -rw-r--r-- | drivers/pci/pci-aardvark.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c index 4e94b776c5..8abbc3ffe8 100644 --- a/drivers/pci/pci-aardvark.c +++ b/drivers/pci/pci-aardvark.c @@ -202,7 +202,7 @@ struct pcie_advk { int sec_busno; struct udevice *dev; struct gpio_desc reset_gpio; - u32 cfgcache[0x34 - 0x10]; + u32 cfgcache[(0x34 - 0x10) / 4]; bool cfgcrssve; }; |