diff options
author | Tom Rini <trini@konsulko.com> | 2022-04-05 11:27:39 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2022-04-05 11:27:39 -0400 |
commit | 037ef53cf01c522073a0a930c84c3ca858f032e1 (patch) | |
tree | aa6ce3d6777690251a57e7bb85c2865005046b30 /drivers/firmware/firmware-zynqmp.c | |
parent | 4de720e98d552dfda9278516bf788c4a73b3e56f (diff) | |
parent | a7379ba6505d70d887951be9ebb3f47e3792c708 (diff) |
Merge tag 'xilinx-for-v2022.07-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2022.07-rc1 v2
xilinx:
- Allow booting bigger kernels till 100MB
zynqmp:
- DT updates (reset IDs)
- Remove unneeded low level uart initialization from psu_init*
- Enable PWM features
- Add support for 1EG device
serial_zynq:
- Change fifo behavior in DEBUG mode
zynq_sdhci:
- Fix BASECLK setting calculation
clk_zynqmp:
- Add support for showing video clock
gpio:
- Update slg driver to handle DT flags
net:
- Update ethernet_id code to support also DM_ETH_PHY
- Add support for DM_ETH_PHY in gem driver
- Enable dynamic mode for SGMII config in gem driver
pwm:
- Add driver for cadence PWM
versal:
- Add support for reserved memory
firmware:
- Handle PD enabling for SPL
- Add support for IOUSLCR SGMII configurations
include:
- Sync phy.h with Linux
- Update xilinx power domain dt binding headers
Diffstat (limited to 'drivers/firmware/firmware-zynqmp.c')
-rw-r--r-- | drivers/firmware/firmware-zynqmp.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 8916c55896..0f0d2b07c0 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -140,6 +140,19 @@ unsigned int zynqmp_firmware_version(void) return pm_api_version; }; +int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config, u32 value) +{ + int ret; + + ret = xilinx_pm_request(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG, + config, value, NULL); + if (ret) + printf("%s: node %d: set_gem_config %d failed\n", + __func__, node, config); + + return ret; +} + int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value) { int ret; @@ -334,7 +347,11 @@ static int zynqmp_firmware_bind(struct udevice *dev) int ret; struct udevice *child; - if (IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) { + if ((IS_ENABLED(CONFIG_SPL_BUILD) && + IS_ENABLED(CONFIG_SPL_POWER_DOMAIN) && + IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN)) || + (!IS_ENABLED(CONFIG_SPL_BUILD) && + IS_ENABLED(CONFIG_ZYNQMP_POWER_DOMAIN))) { ret = device_bind_driver_to_node(dev, "zynqmp_power_domain", "zynqmp_power_domain", dev_ofnode(dev), &child); |