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| author | Tom Rini <trini@konsulko.com> | 2021-03-08 07:11:26 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-03-08 07:41:40 -0500 |
| commit | b0a75dda7e542c9ddea685ceb2251118638829d5 (patch) | |
| tree | e08d4455441a4c1391264f3def8d71354510633a /drivers/ddr | |
| parent | 90964ab5acb29ec6617a9ff340886230b2fce8c7 (diff) | |
| parent | 9773ebcfbca23c7d6fe1dc202913b005bc23cc89 (diff) | |
Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-boot
- Add VAB support
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/altera/Kconfig | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ddr/altera/Kconfig b/drivers/ddr/altera/Kconfig index 8f590dc5f6..4660d20def 100644 --- a/drivers/ddr/altera/Kconfig +++ b/drivers/ddr/altera/Kconfig @@ -1,8 +1,8 @@ config SPL_ALTERA_SDRAM bool "SoCFPGA DDR SDRAM driver in SPL" depends on SPL - depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX - select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX - select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX + depends on TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 || TARGET_SOCFPGA_SOC64 + select RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64 + select SPL_RAM if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_SOC64 help Enable DDR SDRAM controller for the SoCFPGA devices. |