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| author | Tom Rini <trini@konsulko.com> | 2018-01-23 21:48:53 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2018-01-23 21:48:53 -0500 |
| commit | 16121280188d3daa57b18ad623d0845bbbb5a90a (patch) | |
| tree | 1eced38d4dbbb8aa8813ed7095aedd06f0226ec1 /drivers/ddr | |
| parent | a516416d75a9b0f52e9d63d47f8a7bd53239767c (diff) | |
| parent | 6c8945ec41cb7bff27fbacc88316e3e557c20240 (diff) | |
Merge git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'drivers/ddr')
| -rw-r--r-- | drivers/ddr/fsl/fsl_ddr_gen4.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 058c9b9da8..b3a27ec5a8 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -95,6 +95,9 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, if (step == 2) goto step2; + /* Set cdr1 first in case 0.9v VDD is enabled for some SoCs*/ + ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1); + if (regs->ddr_eor) ddr_out32(&ddr->eor, regs->ddr_eor); @@ -183,7 +186,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, ddr_out32(&ddr->ddr_sdram_rcw_4, regs->ddr_sdram_rcw_4); ddr_out32(&ddr->ddr_sdram_rcw_5, regs->ddr_sdram_rcw_5); ddr_out32(&ddr->ddr_sdram_rcw_6, regs->ddr_sdram_rcw_6); - ddr_out32(&ddr->ddr_cdr1, regs->ddr_cdr1); #ifdef CONFIG_DEEP_SLEEP if (is_warm_boot()) { ddr_out32(&ddr->sdram_cfg_2, |