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| author | T Karthik Reddy <t.karthik.reddy@xilinx.com> | 2019-03-12 20:20:20 +0530 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-06-24 13:07:58 +0200 |
| commit | 1d9632a3ccca00638ace1ff6bbce7eba1e15aac7 (patch) | |
| tree | 80c8905ca178e44b698da0bb1bc3adb0befa558e /drivers/ddr/microchip/ddr2_regs.h | |
| parent | 3427f4d2045729c8995b19407daf91ea9a50e4f8 (diff) | |
fpga: zynqpl: Check fpga config completion
This patch checks fpga config completion when a bitstream is loaded
into PL.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'drivers/ddr/microchip/ddr2_regs.h')
0 files changed, 0 insertions, 0 deletions