diff options
| author | Tom Rini <trini@konsulko.com> | 2021-03-12 08:00:39 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-03-12 08:00:39 -0500 |
| commit | ad7e1c7c6e2bde2b369f10984d41d6b1833453fb (patch) | |
| tree | f7bf2fcc1d49c12c45267a4dd9581983445c94d5 /drivers/ddr/marvell/a38x/ddr3_training_leveling.c | |
| parent | 4c8e9361bb3ced3b20e45ee94b3751da1a9ed850 (diff) | |
| parent | 15942805b7efe47e186d8b30ec378666561ad1f9 (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- Some more updates/sync's to A38x DDR3 code (Marek & Pali)
- marvell/ddr/AXP: Some type fixes found in the LTO work (Marek)
- Espressobin: Enable more options (Pali)
- pci-aardvark: Implement workaround for the readback value of
VEND_ID (Paili)
Diffstat (limited to 'drivers/ddr/marvell/a38x/ddr3_training_leveling.c')
| -rw-r--r-- | drivers/ddr/marvell/a38x/ddr3_training_leveling.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c index dadb06b318..6523281f2b 100644 --- a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c +++ b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c @@ -7,7 +7,6 @@ #include "mv_ddr_training_db.h" #include "ddr_training_ip_db.h" #include "mv_ddr_regs.h" -#include <linux/delay.h> #define WL_ITERATION_NUM 10 @@ -916,10 +915,8 @@ int ddr3_tip_dynamic_write_leveling(u32 dev_num, int phase_remove) DEBUG_LEVELING(DEBUG_LEVEL_ERROR, ("training done failed\n")); } else { /* check for training pass */ reg_data = data_read[0]; -#if defined(CONFIG_ARMADA_38X) /* JIRA #1498 for 16 bit with ECC */ if (tm->bus_act_mask == 0xb) /* set to data to 0 to skip the check */ reg_data = 0; -#endif if (reg_data != PASS) DEBUG_LEVELING(DEBUG_LEVEL_INFO, ("training result failed\n")); |