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author | Ye Li <ye.li@nxp.com> | 2023-01-31 16:42:15 +0800 |
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committer | Stefano Babic <sbabic@denx.de> | 2023-03-29 20:15:42 +0200 |
commit | 237ce9b6c4889ce6a493244d71c71fd99d38d034 (patch) | |
tree | c801f64fa1cbd63aff0d9979622bc9a922a3ea59 /drivers/ddr/imx/phy/helper.c | |
parent | bf9866d265fa1d727a675f40c036cd14408ad8d4 (diff) |
imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'drivers/ddr/imx/phy/helper.c')
0 files changed, 0 insertions, 0 deletions