aboutsummaryrefslogtreecommitdiff
path: root/drivers/ddr/imx/imx8m
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2019-12-28 08:07:16 -0500
committerTom Rini <trini@konsulko.com>2019-12-28 08:07:16 -0500
commit6cb87cbb1475f668689f95911d1521ee6ba7f55c (patch)
tree2454e7ad7a284c01cc1150f6d6def994e23c99a6 /drivers/ddr/imx/imx8m
parent831f06fe9af0b45fa2cba64300524d1726fb9241 (diff)
parentfff7b33ce5b1b3687857ea4184d71bf4ce1f6364 (diff)
Merge tag 'u-boot-imx-20191228' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Fixes for 2020.01 ----------------- - Fixes for Nitrogen6x - Fix corruption for mx51evk - colibri i.MX6: fix broken ESDHC conversion - mx6sxsabresd: fix broken mmcdev - imx6q_logic: cleanup boot sequence - update ATF for imx8mq_evk - pfuze: fix pmic_get() Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
Diffstat (limited to 'drivers/ddr/imx/imx8m')
-rw-r--r--drivers/ddr/imx/imx8m/ddr_init.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
index d6e915c9b9..21af66e4e7 100644
--- a/drivers/ddr/imx/imx8m/ddr_init.c
+++ b/drivers/ddr/imx/imx8m/ddr_init.c
@@ -24,7 +24,7 @@ void ddr_init(struct dram_timing_info *dram_timing)
{
unsigned int tmp, initial_drate, target_freq;
- printf("DDRINFO: start DRAM init\n");
+ debug("DDRINFO: start DRAM init\n");
/* Step1: Follow the power up procedure */
if (is_imx8mq()) {
@@ -109,7 +109,7 @@ void ddr_init(struct dram_timing_info *dram_timing)
tmp = reg32_read(DDRPHY_CalBusy(0));
} while ((tmp & 0x1));
- printf("DDRINFO:ddrphy calibration done\n");
+ debug("DDRINFO:ddrphy calibration done\n");
/* Step15: Set SWCTL.sw_done to 0 */
reg32_write(DDRC_SWCTL(0), 0x00000000);
@@ -161,7 +161,7 @@ void ddr_init(struct dram_timing_info *dram_timing)
/* enable port 0 */
reg32_write(DDRC_PCTRL_0(0), 0x00000001);
- printf("DDRINFO: ddrmix config done\n");
+ debug("DDRINFO: ddrmix config done\n");
/* save the dram timing config into memory */
dram_config_save(dram_timing, CONFIG_SAVED_DRAM_TIMING_BASE);