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authorPali Rohár <pali@kernel.org>2023-03-29 21:03:33 +0200
committerStefan Roese <sr@denx.de>2023-03-30 07:05:20 +0200
commit4f67eba7331025029b22d66f2f1c7e2632ac61c3 (patch)
tree0adf570bc57f08ea95681436d987d3c7cd27f52f /drivers/ddr/fsl/mpc85xx_ddr_gen1.c
parent7ba084c7f81f5b31125fdfdefd8e105dbd0366fe (diff)
arm: mvebu: Define all options for A38x BOOT_FROM_* macros
Disassembling A385 BootROM binary reveal how BootROM interprets strapping pins for Boot Device Mode. All possible options are: 0x00..0x07 -> Parallel NOR 0x08..0x15 -> Parallel NAND 0x16..0x17 -> Parallel NOR 0x18..0x25 -> Parallel NAND 0x26..0x27 -> SPI NAND 0x28..0x29 -> UART xmodem 0x2a..0x2b -> SATA 0x2c..0x2d -> PCI Express 0x2e..0x2f -> Parallel NOR 0x30..0x31 -> SD / eMMC 0x32..0x39 -> SPI NOR 0x3a..0x3c -> Parallel NOR 0x3d..0x3e -> UART debug console 0x3f -> Invalid Note that Boot Device Mode Options in A38x Hardware Specifications is incomplete. Signed-off-by: Pali Rohár <pali@kernel.org> Tested-by: Tony Dinh <mibodhi@gmail.com> Tested-by: Martin Rowe <martin.p.rowe@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/ddr/fsl/mpc85xx_ddr_gen1.c')
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