diff options
| author | Dinesh Maniyam <dinesh.maniyam@intel.com> | 2022-06-01 18:49:02 +0800 |
|---|---|---|
| committer | Tien Fong Chee <tien.fong.chee@intel.com> | 2022-06-17 16:27:05 +0800 |
| commit | 32e0379143b433e29d76404f5f4c279067e48853 (patch) | |
| tree | 03a3fa2d78b6d9cc36e3af1b34c692e112e61ae4 /drivers/ddr/altera | |
| parent | d192adafebcd5e742a229aedbdcc7d6957d68f02 (diff) | |
ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Diffstat (limited to 'drivers/ddr/altera')
| -rw-r--r-- | drivers/ddr/altera/sdram_soc64.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c index d6baac2410..9b1710c135 100644 --- a/drivers/ddr/altera/sdram_soc64.c +++ b/drivers/ddr/altera/sdram_soc64.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 /* - * Copyright (C) 2016-2021 Intel Corporation <www.intel.com> + * Copyright (C) 2016-2022 Intel Corporation <www.intel.com> * */ @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat) { u32 dramaddrw = hmc_readl(plat, DRAMADDRW); - phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + + phys_size_t size = (phys_size_t)1 << + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) + DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) + |