diff options
author | Igor Prusov <ivprusov@sberdevices.ru> | 2023-11-09 13:55:15 +0300 |
---|---|---|
committer | Sean Anderson <seanga2@gmail.com> | 2023-12-15 13:05:54 -0500 |
commit | bc3e313ff6af4b5cb09749185d0602a3d4b9b240 (patch) | |
tree | 06d9f19f5818645a670b09dc5d4a47de3d9e60d1 /drivers/clk/clk_pic32.c | |
parent | 258c1002383e5f0ca1d00cc2e4deae3cb488a26d (diff) |
clk: treewide: switch to clock dump from clk_ops
Switch to using new dump operation in clock provider drivers instead of
overriding soc_clk_dump.
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Igor Prusov <ivprusov@sberdevices.ru>
Link: https://lore.kernel.org/r/20231109105516.24892-8-ivprusov@sberdevices.ru
Diffstat (limited to 'drivers/clk/clk_pic32.c')
-rw-r--r-- | drivers/clk/clk_pic32.c | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c index ef06a7fb9f..a77d0e7419 100644 --- a/drivers/clk/clk_pic32.c +++ b/drivers/clk/clk_pic32.c @@ -20,6 +20,8 @@ DECLARE_GLOBAL_DATA_PTR; +#define CLK_MHZ(x) ((x) / 1000000) + /* Primary oscillator */ #define SYS_POSC_CLK_HZ 24000000 @@ -385,9 +387,44 @@ static ulong pic32_set_rate(struct clk *clk, ulong rate) return rate; } +#if IS_ENABLED(CONFIG_CMD_CLK) +static void pic32_dump(struct udevice *dev) +{ + int i; + struct clk clk; + + clk.dev = dev; + + clk.id = PLLCLK; + printf("PLL Speed: %lu MHz\n", + CLK_MHZ(pic32_get_rate(&clk))); + + clk.id = PB7CLK; + printf("CPU Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk))); + + clk.id = MPLL; + printf("MPLL Speed: %lu MHz\n", CLK_MHZ(pic32_get_rate(&clk))); + + for (i = PB1CLK; i <= PB7CLK; i++) { + clk.id = i; + printf("PB%d Clock Speed: %lu MHz\n", i - PB1CLK + 1, + CLK_MHZ(pic32_get_rate(&clk))); + } + + for (i = REF1CLK; i <= REF5CLK; i++) { + clk.id = i; + printf("REFO%d Clock Speed: %lu MHz\n", i - REF1CLK + 1, + CLK_MHZ(pic32_get_rate(&clk))); + } +} +#endif + static struct clk_ops pic32_pic32_clk_ops = { .set_rate = pic32_set_rate, .get_rate = pic32_get_rate, +#if IS_ENABLED(CONFIG_CMD_CLK) + .dump = pic32_dump, +#endif }; static int pic32_clk_probe(struct udevice *dev) |