diff options
author | Tom Rini <trini@konsulko.com> | 2023-03-28 11:21:29 -0400 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2023-03-28 11:21:29 -0400 |
commit | 654483d251275d61eb5f93c18e320ad7d6bfcc5d (patch) | |
tree | 9bb1d7593908a1369e3b450a9f72a39930930f56 /drivers/clk/at91/pmc.h | |
parent | 82b896c1d0514c86fc959c41b493adadb84d6606 (diff) | |
parent | ad59148ff53bc5c38ef2d2cdb7039559ff91a954 (diff) |
Merge tag 'u-boot-at91-2023.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.07 cycle:
This feature set includes the clock changes required for sam9x60 SoC to
support USB host.
Diffstat (limited to 'drivers/clk/at91/pmc.h')
-rw-r--r-- | drivers/clk/at91/pmc.h | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 2b4dd9a3d9..ff464522aa 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -71,6 +71,26 @@ struct clk_pcr_layout { u32 pid_mask; }; +struct clk_usbck_layout { + u32 offset; + u32 usbs_mask; + u32 usbdiv_mask; +}; + +/** + * Clock setup description + * @cid: clock id corresponding to clock subsystem + * @pid: parent clock id corresponding to clock subsystem + * @rate: clock rate + * @prate: parent rate + */ +struct pmc_clk_setup { + unsigned int cid; + unsigned int pid; + unsigned long rate; + unsigned long prate; +}; + extern const struct clk_programmable_layout at91rm9200_programmable_layout; extern const struct clk_programmable_layout at91sam9g45_programmable_layout; extern const struct clk_programmable_layout at91sam9x5_programmable_layout; @@ -87,6 +107,11 @@ struct clk *at91_clk_sam9x5_main(void __iomem *reg, const char *name, const char * const *parent_names, int num_parents, const u32 *mux_table, int type); struct clk * +sam9x60_clk_register_usb(void __iomem *base, const char *name, + const char * const *parent_names, u8 num_parents, + const struct clk_usbck_layout *usbck_layout, + const u32 *clk_mux_table, const u32 *mux_table, u8 id); +struct clk * sam9x60_clk_register_div_pll(void __iomem *base, const char *name, const char *parent_name, u8 id, const struct clk_pll_characteristics *characteristics, @@ -149,4 +174,6 @@ void pmc_write(void __iomem *base, unsigned int off, unsigned int val); void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask, unsigned int bits); +int at91_clk_setup(const struct pmc_clk_setup *setup, int size); + #endif |